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IEEE VLSI Test Symposium

VTS

National

CORE rank

CORE rank (raw)

National/Regional

Fields of research

Computer Systems Engineering

Papers indexed

2,208

1991–2026

Papers per year

199189 peak2026

VTS papers

2,208 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2014Hot topic session 9C: Test and fault tolerance for emerging memory technologies.Suriya Natarajan, Amitava Majumdar, Jeyavijayan Rajendran
2014Built-in self-test for manufacturing TSV defects before bonding.Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Hakim Zimouche
2014Multi-channel testing architecture for high-speed eye-diagram using pin electronics and subsampling monobit reconstruction algorithms.Thomas Moon, Hyun Woo Choi, David C. Keezer, Abhijit Chatterjee
2014Fast evaluation of test vector sets using a simulation-based statistical metric.Shahrzad Mirkhani, Jacob A. Abraham
2014TSV aware timing analysis and diagnosis in paths with multiple TSVs.Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel
2014Continuous wave radar circuitry testing using OFDM technique.Mohamed Metwally, Nicholai L'Esperance, Tian Xia, Mustapha Slamani
2014Innovative practices session 4C: Disruptive solutions in the non-digital world.Amitava Majumdar, Suriya Natarajan, Stephen K. Sunter, Prashant Goteti, Ke Huang
2014Auto-identification of positive feedback loops in multi-state vulnerable circuits.Zhiqiang Liu, You Li, Randall L. Geiger, Degang Chen
2014A built-in self-test technique for load inductance and lossless current sensing of DC-DC converters.Tao Liu, Chao Fu, Sule Ozev, Bertan Bakkaloglu
2014Innovative practices session 2C: Advanced in yield learning.Yen-Tzu Lin, Brady Benware, Brian Stine, Azeez Bhavnagarwala
2014Innovative practices session 3C: Solving today's test challenges.John Kim, Wolfgang Meyer, T. M. Mak, Amitava Majumdar
2014Built-in self test methodology for diagnosis of backend wearout mechanisms in SRAM cells.Woongrae Kim, Linda Milor
2014Innovative practices session 10C: Advances in DFT and compression.Rohit Kapur, Irith Pomeranz
2014Detection, diagnosis, and repair of faults in memristor-based memories.Sachhidh Kannan, Naghmeh Karimi, Ramesh Karri, Ozgur Sinanoglu
2014New topic session 7B: Challenges and opportunities in test and design for test (DFT) of MEMS sensors.Bozena Kaminska, Bernard Courtois, Mary Ann Maher
2014New topic session 2B: Co-design and reliability of power electronic modules - Current status and future challenges.Bozena Kaminska, Bernard Courtois, Chris Bailey
2014Accelerated online error detection in many-core microprocessor architectures.Manolis Kaliorakis, Mihalis Psarakis, Nikos Foutris, Dimitris Gizopoulos
2014Development and empirical verification of an accuracy model for the power down leakage tests.Jae Woong Jeong, Sule Ozev, Friedrich Taenzler, Hui-Chuan Chao
2014Special session 8C: Hot topic: Designers' and test researchers' roles in analog design-for-test.Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma, Terri S. Fiez, Mike Peng Li
2014Test generation and design-for-testability for flow-based mVLSI microfluidic biochips.Kai Hu, Tsung-Yi Ho, Krishnendu Chakrabarty
2014Phase-locked loop design with SPO detection and charge pump trimming for reference spur suppression.Sen-Wen Hsiao, Chung-Chun Chen, Randy Caplan, Jeff Galloway, Blake Gray, Abhijit Chatterjee
2014Fault modeling and test algorithm creation strategy for FinFET-based memories.Gurgen Harutyunyan, Grigor Tshagharyan, Valery A. Vardanian, Yervant Zorian
2014Improving CMOS open defect coverage using hazard activated tests.Chao Han, Adit D. Singh
2014Unstructured text: Test analysis techniques applied to non-test problems.Anne Gattiker
2014Accelerating capture of infrequent errors on ATE for silicon TV tuners.Yongquan Fan, Anant Verma, David S. Trager, Ramin K. Poorfard, John Janney, Sandeep Kumar
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