IEEE VLSI Test Symposium

VTS

National

CORE rank

CORE rank (raw)

National/Regional

Fields of research

Computer Systems Engineering

Papers indexed

2,208

1991–2026

Best Computer Systems Engineering conferences

Papers per year

199189 peak2026

Most published authors

VTS papers

2,208 records sourced from DBLP. Search titles, filter by year, sort by recency.

Year	Title	Authors
2006	Session Abstract.	Yervant Zorian, Dennis Wassung
2006	Session Abstract.	Yervant Zorian, Bruce C. Kim
2006	Design Optimization for Robustness to Single Event Upsets.	Quming Zhou, Mihir R. Choudhury, Kartik Mohanram
2006	Energy Efficient Software-Based Self-Test for Wireless Sensor Network Nodes.	Rong Zhang, Zeljko Zilic, Katarzyna Radecka
2006	Scan Tests with Multiple Fault Activation Cycles for Delay Faults.	Zhuo Zhang, Sudhakar M. Reddy, Irith Pomeranz, Xijiang Lin, Janusz Rajski
2006	Awards.
2006	Test Technology Educational Program (TTEP) Tutorials.
2006	Test Technology Technical Council (TTTC).
2006	Acknowledgments.
2006	Reviewers.
2006	Program Committee.
2006	Steering Committee.
2006	Organizing Committee.
2006	Forward.
2006	Session Abstract.	Cheng-Wen Wu
2006	A New ATPG Method for Efficient Capture Power Reduction During Scan Testing.	Xiaoqing Wen, Seiji Kajihara, Kohei Miyase, Tatsuya Suzuki, Kewal K. Saluja, Laung-Terng Wang, Khader S. Abdel-Hafez, Kozo Kinoshita
2006	RF Front-end System Gain and Linearity Built-in Test.	Qi Wang, Mani Soma
2006	Improved Handling of False and Multicycle Paths in ATPG.	Vlado Vorisek, Bruce Swanson, Kun-Han Tsai, Dhiraj Goswami
2006	Efficient Fault Collapsing via Generalized Dominance Relations.	Vishnu C. Vimjam, Michael S. Hsiao
2006	Session Abstract.	Andreas G. Veneris, Yiorgos Makris
2006	Session Abstract.	James W. Tschanz
2006	Silicon Evaluation of Logic Proximity Bridge Patterns.	Eric N. Tran, Vishwashanth Kasulasrinivas, Sreejit Chakravarty
2006	Early, Accurate and Fast Yield Estimation through Monte Carlo-Alternative Probabilistic Behavioral Analog System Simulations.	Rasit Onur Topaloglu
2006	Mixed PLB and Interconnect BIST for FPGAs Without Fault-Free Assumptions.	Vishal Suthar, Shantanu Dutt
2006	Bridging the Accuracy of Functional and Machine-Learning-Based Mixed-Signal Testing.	Haralampos-G. D. Stratigopoulos, Yiorgos Makris

1,151–1,175 of 2,208← Previous Next →

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