| 2001 | ATPG for Design Errors-Is It Possible? | Magdy S. Abadir, Scott Davidson, Vijay Nagasamy, Dhiraj K. Pradhan, Prab Varma |
| 2000 | Detection of Inter-Port Faults in Multi-Port Static RAMs. | Jun Zhao, V. Swamy Irrinki, Mukesh Puri, Fabrizio Lombardi |
| 2000 | Extraction of Peak-to-Peak and RMS Sinusoidal Jitter Using an Analytic Signal Method. | Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Toshifumi Watanabe, Tadahiro Ohmi |
| 2000 | Simulation-Based Test Algorithm Generation for Random Access Memories. | Chi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Cheng-Wen Wu |
| 2000 | P1450.1: STIL for the Simulation Environmen. | Peter Wohl, Nathan Biggs |
| 2000 | How Should Fault Coverage Be Defined? | Thomas W. Williams, Stephen K. Sunter |
| 2000 | Test Generation for Accurate Prediction of Analog Specifications. | Ramakrishna Voorakaranam, Abhijit Chatterjee |
| 2000 | Biomedical ICs: What is Different about Testing those ICs? | Bapiraju Vinnakota, Andr Ivanov |
| 2000 | A Technique for Logic Fault Diagnosis of Interconnect Open Defects. | Srikanth Venkataraman, Scott Brady Drummonds |
| 2000 | Cold Delay Defect Screening. | Chao-Wen Tseng, Edward J. McCluskey, Xiaoping Shao, David M. Wu |
| 2000 | Characterization of a Pseudo-Random Testing Technique for Analog and Mixed-Signal Built-in-Self-Test. | Jan Arild Tofte, Chee-Kian Ong, Jiun-Lang Huang, Kwang-Ting (Tim) Cheng |
| 2000 | Efficient Diagnosis of Single/Double Bridging Faults with Delta Iddq Probabilistic Signatures and Viterbi Algorithm. | Claude Thibeault |
| 2000 | At-Speed Testing of Delay Faults for Motorola's MPC7400, a PowerPC(tm) Microprocessor. | Nandu Tendolkar, Robert F. Molyneaux, Carol Pyron, Rajesh Raina |
| 2000 | On Test Set Generation for Efficient Path Delay Fault Diagnosis. | Ramesh C. Tekumalla |
| 2000 | Crosstalk Effect Removal for Analog Measurement in Analog Test Bus. | Chauchin Su, Yue-Tsang Chen |
| 2000 | Synthesis for Arithmetic Built-In Self-Tes. | Albrecht P. Stroele |
| 2000 | Bounding Circuit Delay by Testing a Very Small Subset of Paths. | Manish Sharma, Janak H. Patel |
| 2000 | Space Compaction of Test Responses for IP Cores Using Orthogonal Transmission Functions. | Markus Seuring, Krishnendu Chakrabarty |
| 2000 | Static Compaction Techniques to Control Scan Vector Power Dissipation. | Ranganathan Sankaralingam, Rama Rao Oruganti, Nur A. Touba |
| 2000 | A Comprehensive TDM Comparator Scheme for Effective Analysis of Oscillation-Based Test. | Jeongjin Roh, Jacob A. Abraham |
| 2000 | Hardware Resource Minimization for Histogram-Based ADC BIST. | Michel Renovell, Florence Azas, Serge Bernard, Yves Bertrand |
| 2000 | Using Arithmetic Transform for Verification of Datapath Circuits via Error Modeling. | Katarzyna Radecka, Zeljko Zilic |
| 2000 | Delta Iddq for Testing Reliability. | Theo J. Powell, James R. Pair, Melissa St. John, Doug Counce |
| 2000 | Test Selection Based on High Level Fault Simulation for Mixed-Signal Systems. | Sule Ozev, Alex Orailoglu |
| 2000 | The Left Edge Algorithm and the Tree Growing Technique in Block-Test Scheduling under Power Constraints. | Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu |