Jaan Raik
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
94
Venues
16
Active years
1999–2026
Best venue rank
A*
Where they publish
Papers
94 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | DATE | Late Breaking Results: Uncovering the Limits of ECCs in Vision Transformers and a Zero-Cost Reliability Enhancement. | Mohammad Hasan Ahmadilivani, Marten Roots, Marco Restifo, Sven-Markus Loorits, Luca Di Mauro, Jaan Raik |
| 2026 | DDECS | MTBT: Multi-Target Bit Trojan Attack for Quantized Neural Networks. | Akiha Kusumoto, Mohammad Hasan Ahmadilivani, Jaan Raik |
| 2026 | IOLTS | Effective and Memory-Efficient Alternatives to ECC for Reliable Large-Scale DNNs. | Mohammad Hasan Ahmadilivani, Marten Roots, Marco Restifo, Sven-Markus Loorits, Luca Di Mauro, Jaan Raik |
| 2026 | IOLTS | DRsam: Detection of Fault-Based Microarchitectural Side-Channel Attacks in RISC-V Using Statistical Preprocessing and Association Rule Mining. | Muhammad Hassan, Maria Mushtaq, Jaan Raik, Tara Ghasempouri |
| 2026 | VTS | FT-Sparse: Algorithm-Based Fault Tolerance for Sparse CNNs Using Structured Sparsity in GPUs. | Josie E. Rodriguez Condia, Mohammad Hasan Ahmadilivani, Jaan Raik, Maksim Jenihhin, Matteo Sonza Reorda |
| 2025 | ETS | European Test Symposium Teams: an Anniversary Snapshot. | Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilrd Enyedi, Iulia Stefan, Ovidiu Stan, Cosmina Corches, Zebo Peng, Petru Eles, Rolf Drechsler, S. Eggersgl, Grschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, Po-Yao Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, Stefano Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, Patrick Girard, Marcello Traiola, Arnaud Virazel, Fernando Fernandes dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letcia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, Fabian Luis Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, Anurup Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand |
| 2024 | DATE | ADAssure: Debugging Methodology for Autonomous Driving Control Algorithms. | Andrew Roberts, Mohammad Reza Heidari Iman, Mauro Bellone, Tara Ghasempouri, Jaan Raik, Olaf Maennel, Mohammad Hamad, Sebastian Steinhorst |
| 2024 | DDECS | SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators. | Mahdi Taheri, Masoud Daneshtalab, Jaan Raik, Maksim Jenihhin, Salvatore Pappalardo, Paul Jimnez, Bastien Deveautour, Alberto Bosio |
| 2024 | ETS | AdAM: Adaptive Fault-Tolerant Approximate Multiplier for Edge DNN Accelerators. | Mahdi Taheri, Natalia Cherezova, Samira Nazari, Ahsan Rafiq, Ali Azarpeyvand, Tara Ghasempouri, Masoud Daneshtalab, Jaan Raik, Maksim Jenihhin |
| 2024 | IOLTS | Cost-Effective Fault Tolerance for CNNs Using Parameter Vulnerability Based Hardening and Pruning. | Mohammad Hasan Ahmadilivani, Seyedhamidreza Mousavi, Jaan Raik, Masoud Daneshtalab, Maksim Jenihhin |
| 2024 | VTS | Special Session: Reliability Assessment Recipes for DNN Accelerators. | Mohammad Hasan Ahmadilivani, Alberto Bosio, Bastien Deveautour, Fernando Fernandes dos Santos, Juan-David Guerrero-Balaguera, Maksim Jenihhin, Angeliki Kritikakou, Robert Limas Sierra, Salvatore Pappalardo, Jaan Raik, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Mahdi Taheri, Marcello Traiola |
| 2023 | DDECS | APPRAISER: DNN Fault Resilience Analysis Employing Approximation Errors. | Mahdi Taheri, Mohammad Hasan Ahmadilivani, Maksim Jenihhin, Masoud Daneshtalab, Jaan Raik |
| 2023 | ETS | DeepVigor: VulnerabIlity Value RanGes and FactORs for DNNs' Reliability Assessment. | Mohammad Hasan Ahmadilivani, Mahdi Taheri, Jaan Raik, Masoud Daneshtalab, Maksim Jenihhin |
| 2023 | IOLTS | ML-Based Online Design Error Localization for RISC-V Implementations. | Hardi Selg, Maksim Jenihhin, Peeter Ellervee, Jaan Raik |
| 2023 | VTS | Special Session: Approximation and Fault Resiliency of DNN Accelerators. | Mohammad Hasan Ahmadilivani, Mario Barbareschi, Salvatore Barone, Alberto Bosio, Masoud Daneshtalab, Salvatore Della Torca, Gabriele Gavarini, Maksim Jenihhin, Jaan Raik, Annachiara Ruospo, Ernesto Snchez, Mahdi Taheri |
| 2022 | DSD | IMMizer: An Innovative Cost-Effective Method for Minimizing Assertion Sets. | Mohammad Reza Heidari Iman, Jaan Raik, Gert Jervan, Tara Ghasempouri |
| 2021 | CCS | Design Space Exploration of SABER in 65nm ASIC. | Malik Imran, Felipe Almeida, Jaan Raik, Andrea Basso, Sujoy Sinha Roy, Samuel Pagliarini |
| 2021 | DATE | Triple Fixed-Point MAC Unit for Deep Learning. | Madis Kerner, Kalle Tammeme, Jaan Raik, Thomas Hollstein |
| 2021 | DDECS | CLD: An Accurate, Cost-Effective and Scalable Run-Time Cache Leakage Detector. | Ameer Shalabi, Tara Ghasempouri, Peeter Ellervee, Jaan Raik |
| 2021 | DSD | Implementation-Independent Test Generation for a Large Class of Faults in RISC Processor Modules. | Maksim Jenihhin, Adeboye Stephen Oyeniran, Jaan Raik, Raimund Ubar |
| 2021 | IOLTS | High-level Intellectual Property Obfuscation via Decoy Constants. | Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini |
| 2020 | DATE | RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. | Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendrfer, Christian Sauer, Anton Klotz, Michael Hbner, Jrg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka |
| 2020 | DDECS | A Security Verification Template to Assess Cache Architecture Vulnerabilities. | Tara Ghasempouri, Jaan Raik, Kolin Paul, Cezar Reinbrecht, Said Hamdioui, Mottaqiallah Taouil |
| 2020 | DSD | Implementation-Independent Functional Test for Transition Delay Faults in Microprocessors. | Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik |
| 2020 | DSD | Adjustable self-healing methodology for accelerated functions in heterogeneous systems. | Mohammad Riazati, Tara Ghasempouri, Masoud Daneshtalab, Jaan Raik, Mikael Sjdin, Bjrn Lisper |
| 2020 | DSD | SCAAT: Secure Cache Alternative Address Table for mitigating cache logical side-channel attacks. | Ameer Shalabi, Tara Ghasempouri, Peeter Ellervee, Jaan Raik |
| 2020 | EDCC | Data-Driven Cross-Layer Fault Management Architecture for Sensor Networks. | Lauri Vihman, Maarja Kruusmaa, Jaan Raik |
| 2020 | ETS | LiD-CAT: A Lightweight Detector for Cache ATtacks. | Cezar Reinbrecht, Said Hamdioui, Mottaqiallah Taouil, Behrad Niazmand, Tara Ghasempouri, Jaan Raik, Johanna Seplveda |
| 2020 | FCCM | An Efficient FPGA-based Architecture for Contractive Autoencoders. | Madis Kerner, Kalle Tammeme, Jaan Raik, Thomas Hollstein |
| 2019 | DDECS | New categories of Safe Faults in a processor-based Embedded System. | Cemil Cem Grsoy, Maksim Jenihhin, Adeboye Stephen Oyeniran, Davide Piumatti, Jaan Raik, Matteo Sonza Reorda, Raimund Ubar |
| 2019 | DDECS | Fault-Aware Performance Assessment Approach for Embedded Networks. | Jan Malburg, Karl Janson, Jaan Raik, Frank Dannemann |
| 2019 | ETS | High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC Processors. | Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Grsoy, Jaan Raik |
| 2019 | FDL | RTL Assertion Mining with Automated RTL-to-TLM Abstraction. | Tara Ghasempouri, Alessandro Danese, Graziano Pravadelli, Nicola Bombieri, Jaan Raik |
| 2019 | IOLTS | Efficient Fault Injection based on Dynamic HDL Slicing Technique. | Ahmet Cagri Bagbaba, Maksim Jenihhin, Jaan Raik, Christian Sauer |
| 2019 | IOLTS | Application Specific True Critical Paths Identification in Sequential Circuits. | Lembit Jrimgi, Raimund Ubar, Maksim Jenihhin, Jaan Raik, Sergei Devadze, Adeboye Stephen Oyeniran |
| 2019 | IOLTS | PASCAL: Timing SCA Resistant Design and Verification Flow. | Xinhui Lai, Maksim Jenihhin, Jaan Raik, Kolin Paul |
| 2019 | ITC | IEEE European Test Symposium (ETS). | Stephan Eggersgl, Said Hamdioui, Artur Jutman, Maria K. Michael, Jaan Raik, Matteo Sonza Reorda, Mehdi Baradaran Tahoori, Elena-Ioana Vatajelu |
| 2018 | DDECS | QoSinNoC: Analysis of QoS-Aware NoC Architectures for Mixed-Criticality Applications. | Serhiy Avramenko, Siavoosh Payandeh Azad, Stefano Esposito, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin |
| 2018 | DDECS | Software-Level TMR Approach for On-Board Data Processing in Space Applications. | Karl Janson, Carl Johann Treudler, Thomas Hollstein, Jaan Raik, Maksim Jenihhin, Grschwin Fey |
| 2018 | IOLTS | Reliability Improvements for Multiprocessor Systems by Health-Aware Task Scheduling. | Robert Schmidt, Rehab Massoud, Jaan Raik, Alberto Garca Ortiz, Rolf Drechsler |
| 2017 | DATE | BASTION: Board and SoC test instrumentation for ageing and no failure found. | Artur Jutman, Christophe Lotz, Erik Larsson, Matteo Sonza Reorda, Maksim Jenihhin, Jaan Raik, Hans G. Kerkhoff, Rene Krenz-Baath, Piet Engelke |
| 2017 | DDECS | From online fault detection to fault management in Network-on-Chips: A ground-up approach. | Siavoosh Payandeh Azad, Behrad Niazmand, Karl Janson, Nevin George, Stephen Adeboye Oyeniran, Tsotne Putkaradze, Apneet Kaur, Jaan Raik, Gert Jervan, Raimund Ubar, Thomas Hollstein |
| 2017 | DDECS | A scalable technique to identify true critical paths in sequential circuits. | Raimund Ubar, Sergei Kostin, Maksim Jenihhin, Jaan Raik |
| 2017 | ETS | Automated area and coverage optimization of minimal latency checkers. | Siavoosh Payandeh Azad, Behrad Niazmand, Apneet Kaur Sandhu, Jaan Raik, Gert Jervan, Thomas Hollstein |
| 2017 | ISCAS | Comprehensive performance and robustness analysis of 2D turn models for network-on-chips. | Siavoosh Payandeh Azad, Behrad Niazmand, Karl Janson, Thilo Kogge, Jaan Raik, Gert Jervan, Thomas Hollstein |
| 2017 | ICTERI | Multi-Fragment Markov Model Guided Online Test Generation for MPSoC. | Jri Vain, Leonidas Tsiopoulos, Vyacheslav S. Kharchenko, Apneet Kaur, Maksim Jenihhin, Jaan Raik |
| 2016 | DATE | A synthesis-agnostic behavioral fault model for high gate-level fault coverage. | Anton Karputkin, Jaan Raik |
| 2016 | FDL | Designing reliable cyber-physical systems overview associated to the special session at FDL'16. | Gadi Aleksandrowicz, Eli Arbel, Roderick Bloem, Timon D. ter Braak, Sergei Devadze, Grschwin Fey, Maksim Jenihhin, Artur Jutman, Hans G. Kerkhoff, Robert Knighofer, Jan Malburg, Shiri Moran, Jaan Raik, Gerard K. Rauwerda, Heinz Riener, Franz Rck, Konstantin Shibin, Kim Sunesen, Jinbo Wan, Yong Zhao |
| 2015 | DDECS | SystemC-Based Loose Models for Simulation Speed-Up by Abstraction of RTL IP Cores. | Syed Saif Abrar, Maksim Jenihhin, Jaan Raik |
| 2015 | DDECS | New Fault Models and Self-Test Generation for Microprocessors Using High-Level Decision Diagrams. | Artjom Jasnetski, Jaan Raik, Anton Tsertov, Raimund Ubar |
| 2015 | DDECS | SPICE-Inspired Fast Gate-Level Computation of NBTI-induced Delays in Nanoscale Logic. | Sergei Kostin, Jaan Raik, Raimund Ubar, Maksim Jenihhin, Thiago Copetti, Fabian Vargas, Letcia Maria Bolzani Phls |
| 2015 | DSD | A Framework for Comprehensive Automated Evaluation of Concurrent Online Checkers. | Pietro Saltarelli, Behrad Niazmand, Jaan Raik, Ranganathan Hariharan, Gert Jervan, Thomas Hollstein |
| 2014 | DSD | Critical Path Tracing Based Simulation of Transition Delay Faults. | Jaak Kousaar, Raimund Ubar, Sergei Devadze, Jaan Raik |
| 2014 | ETS | Logic simulation and fault collapsing with shared structurally synthesized bdds. | Dmitri Mironov, Raimund Ubar, Jaan Raik |
| 2013 | DDECS | Extensible open-source framework for translating RTL VHDL IP cores to SystemC. | Syed Saif Abrar, Maksim Jenihhin, Jaan Raik |
| 2013 | DSD | Identifying NBTI-Critical Paths in Nanoscale Logic. | Raimund Ubar, Fabian Vargas, Maksim Jenihhin, Jaan Raik, Sergei Kostin, Letcia Maria Bolzani Poehls |
| 2012 | DDECS | Low-area boundary BIST architecture for mesh-like network-on-chip. | Jaan Raik, Vineeth Govind |
| 2012 | DDECS | Multiple stuck-at-fault detection theorem. | Raimund Ubar, Sergei Kostin, Jaan Raik |
| 2012 | DSD | How to Prove that a Circuit is Fault-Free? | Raimund Ubar, Sergei Kostin, Jaan Raik |
| 2012 | ETS | FP7 collaborative research project DIAMOND: Diagnosis, error modeling and correction for reliable systems design. | Jaan Raik |
| 2012 | ETS | Combining dynamic slicing and mutation operators for ESL correction. | Urmas Repinski, Hanno Hantson, Maksim Jenihhin, Jaan Raik, Raimund Ubar, Giuseppe Di Guglielmo, Graziano Pravadelli, Franco Fummi |
| 2011 | DDECS | Probabilistic equivalence checking based on high-level decision diagrams. | Anton Karputkin, Raimund Ubar, Mati Tombak, Jaan Raik |
| 2011 | DDECS | Defect-oriented module-level fault diagnosis in digital circuits. | Sergei Kostin, Raimund Ubar, Jaan Raik |
| 2011 | ETS | Constraint-Based Hierarchical Untestability Identification for Synchronous Sequential Circuits. | Jaan Raik, Anna Rannaste, Maksim Jenihhin, Taavi Viilukas, Raimund Ubar, Hideo Fujiwara |
| 2010 | DATE | Parallel X-fault simulation with critical path tracing technique. | Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman |
| 2010 | DDECS | Constraint-based test pattern generation at the Register-Transfer Level. | Taavi Viilukas, Jaan Raik, Maksim Jenihhin, Raimund Ubar, Anna Krivenko |
| 2010 | DSD | Structurally Synthesized Multiple Input BDDs for Speeding Up Logic-Level Simulation of Digital Circuits. | Dmitri Mironov, Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman |
| 2010 | ISCAS | Fault collapsing with linear complexity in digital circuits. | Raimund Ubar, Dmitri Mironov, Jaan Raik, Artur Jutman |
| 2009 | DSD | Block-Level Fault Model-Free Debug and Diagnosis in Digital Systems. | Raimund Ubar, Sergei Kostin, Jaan Raik |
| 2008 | ASPDAC | Parallel fault backtracing for calculation of fault coverage. | Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman |
| 2008 | DDECS | Web-Based Framework for Parallel Distributed Test. | Eero Ivask, Jaan Raik, Raimund Ubar |
| 2008 | DDECS | Code Coverage Analysis using High-Level Decision Diagrams. | Jaan Raik, Uljana Reinsalu, Raimund Ubar, Maksim Jenihhin, Peeter Ellervee |
| 2008 | DSD | Hierarchical Analysis of Short Defects between Metal Lines in CMOS IC. | Witold A. Pleskacz, Maksim Jenihhin, Jaan Raik, Michal Rakowski, Raimund Ubar, Wieslaw Kuzmicz |
| 2008 | ETS | Temporally Extended High-Level Decision Diagrams for PSL Assertions Simulation. | Maksim Jenihhin, Jaan Raik, Anton Chepurov, Raimund Ubar |
| 2008 | IDC | Distributed Approach for Genetic Test Generation in the Field of Digital Electronics. | Eero Ivask, Jaan Raik, Raimund Ubar |
| 2007 | DDECS | Layout to Logic Defect Analysis for Hierarchical Test Generation. | Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A. Pleskacz, Michal Rakowski |
| 2007 | DSD | Hierarchical Identification of Untestable Faults in Sequential Circuits. | Jaan Raik, Raimund Ubar, Anna Krivenko, Margus Kruus |
| 2007 | DSD | Fault Diagnosis in Integrated Circuits with BIST. | Raimund Ubar, Sergei Kostin, Jaan Raik, Teet Evartson, Harri Lensen |
| 2007 | ETS | Test Configurations for Diagnosing Faulty Links in NoC Switches. | Jaan Raik, Raimund Ubar, Vineeth Govind |
| 2007 | ETS | Ultra Fast Parallel Fault Analysis on Structurally Synthesized BDDs. | Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman |
| 2006 | DSD | High-Level Decision Diagram based Fault Models for Targeting FSMs. | Jaan Raik, Raimund Ubar, Taavi Viilukas |
| 2005 | DSD | An Educational Environment for Digital Testing: Hardware, Tools, and Web-Based Runtime Platform. | Artur Jutman, Jaan Raik, Raimund Ubar, V. Vislogubov |
| 2005 | DSD | Improved Fault Emulation for Synchronous Sequential Circuits. | Jaan Raik, Peeter Ellervee, Valentin Tihhomirov, Raimund Ubar |
| 2005 | DSD | Defect-Oriented Test- and Layout-Generation for Standard-Cell ASIC Designs. | Joachim Sudbrock, Jaan Raik, Raimund Ubar, Wieslaw Kuzmicz, Witold A. Pleskacz |
| 2005 | EDCC | Efficient Single-Pattern Fault Simulation on Structurally Synthesized BDDs. | Jaan Raik, Raimund Ubar, Sergei Devadze, Artur Jutman |
| 2005 | ETS | DOT: new deterministic defect-oriented ATPG tool. | Jaan Raik, Raimund Ubar, Joachim Sudbrock, Wieslaw Kuzmicz, Witold A. Pleskacz |
| 2004 | FPL | Evaluating Fault Emulation on FPGA. | Peeter Ellervee, Jaan Raik, Valentin Tihhomirov, Kalle Tammeme |
| 2002 | DATE | Internet-Based Collaborative Test Generation with MOSCITO. | Andr Schneider, Karl-Heinz Diener, Eero Ivask, Jaan Raik, Raimund Ubar, P. Miklos, T. Cibkov, Elena Gramatov |
| 2000 | DATE | Cycle-Based Simulation Algorithms for Digital Systems Using High-Level Decision Diagrams. | Adam Morawiec, Raimund Ubar, Jaan Raik |
| 2000 | ETS | Hierarchical defect-oriented fault simulation for digital circuits. | Mykola Blyzniuk, T. Cibkov, Elena Gramatov, Wieslaw Kuzmicz, M. Lobur, Witold A. Pleskacz, Jaan Raik, Raimund Ubar |
| 2000 | ISCAS | Back-tracing and event-driven techniques in high-level simulation with decision diagrams. | Raimund Ubar, Jaan Raik, Adam Morawiec |
| 1999 | DATE | Sequential Circuit Test Generation Using Decision Diagram Models. | Jaan Raik, Raimund Ubar |
| 1999 | DATE | Cycle-based Simulation with Decision Diagrams. | Raimund Ubar, Jaan Raik, Adam Morawiec |
| 1999 | ETS | High-level path activation technique to speed up sequential circuit test generation. | Jaan Raik, Raimund Ubar |