| 2014 | A 64-MHz∼640-MHz 64-phase clock generator. | Hong-Yi Huang, Jen-Chieh Liu, Shi-Jia Sun, Cheng-Hao Fu, Kuo-Hsing Cheng |
| 2014 | High throughput architecture for the Advanced Encryption Standard Algorithm. | Salma Hesham, Mohamed A. Abd El Ghany, Klaus Hofmann |
| 2014 | Online testing of many-core systems in the Dark Silicon era. | Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen |
| 2014 | Multistage low ripple charge pump. | Andrzej Grodzicki, Witold A. Pleskacz |
| 2014 | Modeling and analysis of cracked through silicon via (TSV) interconnections. | Vasileios Gerakis, Christina Avdikou, Alexandros Liolios, Alkis A. Hatzopoulos |
| 2014 | On the in-field test of Branch Prediction Units using the correlated predictor mechanism. | Marco Gaudesi, S. Saleem, Ernesto Snchez, Matteo Sonza Reorda, E. Tanowe |
| 2014 | Designing of Test Pattern Generators for stimulation of crosstalk faults in bus-type connections. | Tomasz Garbolino |
| 2014 | Sources of bias in EDA tools and its influence. | Petr Fiser, Jan Schmidt, Jiri Balcarek |
| 2014 | Efficient VHDL implementation of symbol synchronization for software radio based on FPGA. | Pavel Fiala, Richard Linhart |
| 2014 | Reliable execution of statechart-generated correct embedded software under soft errors. | Ronaldo Rodrigues Ferreira, Thomas Klotz, Thilo Vrtler, Jean da Rolt, Gabriel L. Nazar, lvaro Freitas Moreira, Luigi Carro, Karsten Einwich |
| 2014 | Low latency book handling in FPGA for high frequency trading. | Milan Dvorak, Jan Korenek |
| 2014 | An efficient hardware architecture for inter-prediction in H.264/AVC encoders. | Nam-Khanh Dang, Xuan-Tu Tran, Alain Merirot |
| 2014 | A study on fast pipelined pseudo-random number generator based on chaotic logistic map. | Pawel Dabal, Ryszard Pelka |
| 2014 | A unified CMOS inverter model for planar and FinFET nanoscale technologies. | Panagiotis Chaourani, Spyridon Nikolaidis |
| 2014 | A novel impedance calculation method and its time efficiency evaluation. | Juraj Brenkus, Viera Stopjakov, Daniel Arbet, Gbor Gyepes, Libor Majer |
| 2014 | An intra-cell defect grading tool. | Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, Arnaud Virazel, S. Bernabovi, Paolo Bernardi |
| 2014 | Customer return detection with features selection. | Domenico Bertoncelli, Pasquale Caianiello |
| 2014 | Generic built-in self-repair architectures for SoC logic cores. | Marcel Balz, Stefan Kristofk, Mria Fischerov |
| 2014 | Analysis of current conveyor non-idealities for implementation as integrator in delta sigma modulators. | Harish Balasubramaniam, Klaus Hofmann |
| 2014 | A design of an area-efficient 10-GHz phase-locked loop for source-synchronous, multi-channel links in 90-nm CMOS technology. | Woo-Rham Bae, Deog-Kyoon Jeong, Byoung-Joo Yoo |
| 2014 | Quality assurance in memory built-in self-test tools. | Albert Au, Artur Pogiel, Janusz Rajski, Piotr Sydow, Jerzy Tyszer, Justyna Zawada |
| 2014 | Path delay test in the presence of multi-aggressor crosstalk, power supply noise and ground bounce. | Anu Asokan, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel |
| 2014 | Verifying robust frequency domain properties of non linear oscillators using SMT. | Hafiz ul Asad, Kevin D. Jones, Frdric Surre |
| 2014 | Fast time-parallel C-based event-driven RTL simulation. | Tariq Bashir Ahmad, Maciej J. Ciesielski |
| 2014 | A double-path intra prediction architecture for the hardware H.265/HEVC encoder. | Andrzej Abramowski, Grzegorz Pastuszak |