| 2011 | A chaos-based pseudo-random bit generator implemented in FPGA device. | Pawel Dabal, Ryszard Pelka |
| 2011 | An analog perspective on device reliability in 32nm high-κ metal gate technology. | Florian Chouard, Shailesh More, Michael Fulde, Doris Schmitt-Landsiedel |
| 2011 | Dual use of power lines for data communications in microprocessors. | Vipul Chawla, Dong Sam Ha |
| 2011 | Testing and design-for-testability solutions for 3D integrated circuits. | Krishnendu Chakrabarty |
| 2011 | Optimized embedded memory diagnosis. | Mauricio de Carvalho, Paolo Bernardi, Matteo Sonza Reorda, Nicola Campanelli, Tamas Kerekes, Davide Appello, Mario Barone, Vincenzo Tancorre, Marco Terzi |
| 2011 | Design technology and the cloud. | Raul Camposano |
| 2011 | An architecture and an FPGA prototype of a reliable processor pipeline towards multiple soft- and timing errors. | Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf |
| 2011 | A memetic algorithm for computing 3D capacitance in multiconductor VLSI circuits. | Yiorgos I. Bontzios, Michael G. Dimopoulos, Alkis A. Hatzopoulos |
| 2011 | Failure probability of SRAM-FPGA systems with Stochastic Activity Networks. | Cinzia Bernardeschi, Luca Cassano, Andrea Domenici |
| 2011 | Muller C-elements based on minority-3 functions for ultra low voltage supplies. | Hans Kristian Otnes Berge, Amir Hasanbegovic, Snorre Aunet |
| 2011 | TLM protocol compliance checking at the Electronic System Level. | Mohamed Bawadekji, Daniel Groe, Rolf Drechsler |
| 2011 | Decreasing test time by scan chain reorganization. | Pavel Bartos, Zdenek Kotsek, Jan Dohnal |
| 2011 | Error recovery technique for coarse-grained reconfigurable architectures. | Muhammad Moazam Azeem, Stanislaw J. Piestrak, Olivier Sentieys, Sbastien Pillement |
| 2011 | Implementation of Selective Fault Tolerance with conventional synthesis tools. | Michael Augustin, Michael Gssel, Rolf Kraemer |
| 2011 | Increasing the efficiency of analog OBIST using on-chip compensation of technology variations. | Daniel Arbet, Juraj Brenkus, Gbor Gyepes, Viera Stopjakov |
| 2011 | Future of EDA: Usual suspect or silent hero for successful semiconductor business? | Jrgen Alt |
| 2011 | Improving performance of robust Self Adaptive Caches by optimizing the switching algorithm. | Liviu Agnola, Mircea Vladutiu, Mihai Udrescu, Lucian Prodan |
| 2011 | High performance adaptive sensor interface design through model based estimation of analog non-idealities. | Sumit Adhikari, Muhammad Farooq, Jan Haase, Christoph Grimm |
| 2010 | Decoupling capacitance study and optimization method for high-performance VLSIs. | Qing K. Zhu, Joe Yong, Tom Mozdzen |
| 2010 | NoGap | Wenbiao Zhou, Per Karlstrm, Dake Liu |
| 2010 | Evaluation of transition untestable faults using a multi-cycle capture test generation method. | Masayoshi Yoshimura, Hiroshi Ogawa, Toshinori Hosokawa, Koji Yamazaki |
| 2010 | Tree-model based mapping for energy-efficient and low-latency Network-on-Chip. | Bo Yang, Thomas Canhao Xu, Tero Sntti, Juha Plosila |
| 2010 | A low phase noise 20 GHz voltage control oscillator using 0.18-μm CMOS technology. | Chia-Ming Yang, Hsuan-Ling Kao, Y. C. Chang, M. T. Chen, H. M. Chang, C. H. Wu |
| 2010 | Asynchronous design, Quo Vadis? | Alex Yakovlev |
| 2010 | Computation reduction for statistical analysis of the effect of nano-CMOS variability on asynchronous circuits. | Zheng Xie, Doug A. Edwards |