| 2010 | Theorem proving techniques for the formal verification of NoC communications with non-minimal adaptive routing. | Amr Helmy, Laurence Pierre, Axel Jantsch |
| 2010 | Fault diagnosis of crosstalk induced glitches and delay faults. | Shehzad Hasan, Ajoy Kumar Palit, Walter Anheier |
| 2010 | A 3-5GHz UWB CMOS receiver with digital control technique. | Bo Han, Mengmeng Liu, Ning Ge |
| 2010 | Advanced embedded memory testing: Reducing the defect per million level at lower test cost. | Said Hamdioui, Ad J. van de Goor |
| 2010 | Receiver synchronization in video streaming with short latency over asynchronous networks. | Jiri Halak, Sven Ubik, Petr Zejdl |
| 2010 | Synthesizing simulators for model checking microcontroller binary code. | Dominique Gckel, Bastian Schlich, Jrg Brauer, Stefan Kowalewski |
| 2010 | A comparison of low voltage LNA architectures designed for multistandard GNSS in two 90 nm CMOS technologies. | Jacek Gradzki, Tomasz Borejko, Witold A. Pleskacz |
| 2010 | Low-cost, customized and flexible SRAM MBIST engine. | Ad J. van de Goor, Christian Jung, Said Hamdioui, Georgi Gaydadjiev |
| 2010 | Using a CISC microcontroller to test embedded memories. | Ad J. van de Goor, Said Hamdioui, Georgi Gaydadjiev |
| 2010 | How to reduce size of a signature-based diagnostic dictionary used for testing of connections. | Tomasz Garbolino, Krzysztof Gucwa, Andrzej Hlawiczka |
| 2010 | SREEP: Shift Register Equivalents Enumeration and Synthesis Program for secure scan design. | Katsuya Fujiwara, Hideo Fujiwara, Marie Engelene J. Obien, Hideo Tamamoto |
| 2010 | A deterministic approach for hardware fault injection in asynchronous QDI logic. | Werner Friesenbichler, Thomas Panhofer, Andreas Steininger |
| 2010 | A better-than-worst-case robustness measure. | Stefan Frehse, Grschwin Fey, Rolf Drechsler |
| 2010 | On logic synthesis of conventionally hard to synthesize circuits using genetic programming. | Petr Fiser, Jan Schmidt, Zdenek Vascek, Luks Sekanina |
| 2010 | Comparison of jitter decomposition methods for BER analysis of high-speed serial links. | Stefan Erb, Wolfgang Pribyl |
| 2010 | An integrated low power buck converter with a comparator controlled low-side switch. | Reinhard Enne, Horst Zimmermann |
| 2010 | Partitioning methods for unicast/multicast traffic in 3D NoC architecture. | Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Hannu Tenhunen |
| 2010 | Formal verification meets robustness checking - Techniques and challenges. | Rolf Drechsler, Grschwin Fey |
| 2010 | Test pattern generation for the combinational representation of asynchronous circuits. | Roland Dobai, Elena Gramatov |
| 2010 | A Build-In Self-Test technique for RF Mixers. | Lambros Dermentzoglou, Angela Arapoyanni, Yiorgos Tsiatouhas |
| 2010 | A 12-bit fully differential 2MS/s successive approximation analog-to-digital converter with reduced power consumption. | Milos Davidovic, Gerald Zach, Horst Zimmermann |
| 2010 | Instruction set extensions for multi-threading in LEON3. | Martin Danek, Leos Kafka, Lukas Kohout, Jaroslav Sykora |
| 2010 | A time-to-digital converter using multi-phase-sampling and time amplifier for all digital phase-locked loop. | Kuo-Hsing Cheng, Chang-Chien Hu, Jen-Chieh Liu, Hong-Yi Huang |
| 2010 | Design of a single layer programmable Structured ASIC library. | Thomas C. P. Chau, David W. L. Wu, Yanqing Ai, Brian P. W. Chan, Sam M. H. Ho, Oscar K. L. Lau, Steve C. L. Yuen, Kong-Pang Pun, Oliver C. S. Choy, Philip Heng Wai Leong |
| 2010 | Cumulative embedded memory failure bitmap display & analysis. | Nicola Campanelli, Tamas Kerekes, Paolo Bernardi, Mauricio de Carvalho, Alessandro Panariti, Matteo Sonza Reorda, Davide Appello, Mario Barone |