| 2014 | Quantified contribution of design for manufacturing to yield at 28nm. | Thomas Herrmann, Shobhit Malik, Sriram Madhavan |
| 2014 | Cell-aware experiences in a high-quality automotive test suite. | Friedrich Hapke, Ralf Arnold, Matthias Beck, M. Baby, S. Straehle, J. F. Goncalves, A. Panait, R. Behr, Gwenol Maugard, A. Prashanthi, Juergen Schloeffel, Wilfried Redemund, Andreas Glowatz, Anja Fast, Janusz Rajski |
| 2014 | M-S specification binning based on digitally coded indirect measurements. | lvaro Gmez-Pau, Luz Balado, Joan Figueras |
| 2014 | Model based generation of high coverage test suites for embedded systems. | Orlando Ferrante, Alberto Ferrari, Marco Marazza |
| 2014 | Optimization-based multiple target test generation for highly compacted test sets. | Stephan Eggersgl, Kenneth Schmitz, Rene Krenz-Baath, Rolf Drechsler |
| 2014 | Secure and efficient LBIST for feedback shift register-based cryptographic systems. | Elena Dubrova, Mats Nslund, Gran Selander |
| 2014 | Sat-based speedpath debugging using waveforms. | Mehdi Dehbashi, Grschwin Fey |
| 2014 | Optimization of analog fault coverage by exploiting defect-specific masking. | Anthony Coyette, Georges G. E. Gielen, Ronny Vanhooren, Wim Dobbelaere |
| 2014 | Diagnosis of multiple faults with highly compacted test responses. | Alejandro Cook, Hans-Joachim Wunderlich |
| 2014 | Quantitative evaluation of register vulnerabilities in RTL control paths. | Liang Chen, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori |
| 2014 | A generic and high-level model of large unreliable NoCs for fault tolerance and performance analysis. | Fabien Chaix, Nacer-Eddine Zergainoh, Michael Nicolaidis |
| 2014 | A novel adaptive fault tolerant flip-flop architecture based on TMR. | Luca Cassano, Alberto Bosio, Giorgio Di Natale |
| 2014 | A true random number generator with on-line testability. | Eberhard Bhl, Matthew Lewis, S. Galkin |
| 2014 | A collision resistant deterministic random bit generator with fault attack detection possibilities. | Eberhard Bhl, Matthew Lewis, Klaus Damm |
| 2014 | Automatic correction of certain design errors using mutation technique. | Payman Behnam, Bijan Alizadeh, Zainalabedin Navabi |
| 2014 | Design of low cost fault tolerant analog circuits using real-time learned error compensation. | Suvadeep Banerjee, lvaro Gmez-Pau, Abhijit Chatterjee |
| 2014 | Triple error detection for Imai-Kamiyanagi codes based on subsyndrome computations. | Christian Badack, Michael Gssel |
| 2014 | Factoring variability in the Design/Technology Co Optimisation (DTCO) in advanced CMOS. | Asen Asenov |
| 2014 | Power efficient scan testing by exploiting existing error tolerance circuitry in a design. | Anthi Anastasiou, Yiorgos Tsiatouhas |
| 2014 | Test-mode-only scan attack using the boundary scan chain. | Sk Subidh Ali, Ozgur Sinanoglu, Ramesh Karri |
| 2014 | Fault injection and fault tolerance methodologies for assessing device robustness and mitigating against ionizing radiation. | Dan Alexandrescu, Luca Sterpone, Celia Lpez-Ongil |
| 2013 | Adaptive quality binning for analog circuits. | Ender Yilmaz, Sule Ozev, Kenneth M. Butler |
| 2013 | Information-theoretic syndrome and root-cause analysis for guiding board-level fault diagnosis. | Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty, Xinli Gu |
| 2013 | Analyzing resistive-open defects in SRAM core-cell under the effect of process variability. | Elena I. Vatajelu, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine |
| 2013 | New test compression scheme based on low power BIST. | Jerzy Tyszer, Michal Filipek, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski |