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IEEE European Test Symposium

ETS

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

1,163

1999–2026

Papers per year

199968 peak2026

ETS papers

1,163 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2012Online detection and recovery of transient errors in front-end structures of microprocessors.Syed Zafar Shazli, Mehdi Baradaran Tahoori
2012On the quality of test vectors for post-silicon characterization.Matthias Sauer, Alexander Czutro, Bernd Becker, Ilia Polian
2012DfT support for launch and capture power reduction in launch-off-capture testing.Samah Mohamed Saeed, Ozgur Sinanoglu
2012Combining dynamic slicing and mutation operators for ESL correction.Urmas Repinski, Hanno Hantson, Maksim Jenihhin, Jaan Raik, Raimund Ubar, Giuseppe Di Guglielmo, Graziano Pravadelli, Franco Fummi
2012Toggle-masking scheme for x-filtering.Abishek Ramdas, Ozgur Sinanoglu
2012FP7 collaborative research project DIAMOND: Diagnosis, error modeling and correction for reliable systems design.Jaan Raik
2012Fault tolerant FPGA processor based on runtime reconfigurable modules.Mihalis Psarakis, Andreas Apostolakis
2012Functional test generation for hard to detect stuck-at faults using RTL model checking.Mahesh Prabhu, Jacob A. Abraham
2012On the detection of path delay faults by functional broadside tests.Irith Pomeranz
2012Enhanced wafer matching heuristics for 3-D ICs.Vasilis F. Pavlidis, Hu Xu, Giovanni De Micheli
2012Introducing MEDIAN: A new COST Action on manufacturable and dependable multicore architectures at nanoscale.Marco Ottavi
2012Reducing wearout in embedded processors using proactive fine-grain dynamic runtime adaptation.Fabian Oboril, Mehdi Baradaran Tahoori
2012Fast error detection through efficient use of hardwired resources in FPGAs.Gabriel L. Nazar, Luigi Carro
2012Multi-voltage aware resistive open fault modeling.Mohamed Tagelsir Mohammadat, Noohul Basheer Zain Ali, Fawnizu Azmadi Hussin
2012On-chip temperature and voltage measurement for field testing.Yukiya Miura, Yasuo Sato, Yousuke Miyake, Seiji Kajihara
2012Through-Silicon-Via resistive-open defect analysis.Carolina Metzler, Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel
2012The impact of functional safety standards in the design and test of reliable and available integrated circuits.Riccardo Mariani
2012Impact of NBTI on analog components.Zhengliang Lv, Linda Milor, Shiyuan Yang
2012Indirect method for random jitter measurement on SoCs using critical path characterization.Jae Wook Lee, Ji Hwan (Paul) Chun, Jacob A. Abraham
2012Enhanced reduced code linearity test technique for multi-bit/stage pipeline ADCs.Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Herv Naudet, Christophe Forel
2012A robust metric for screening outliers from analogue product manufacturing tests responses.Shaji Krishnan, Hans G. Kerkhoff
2012Characterization and handling of low-cost micro-architectural signatures in MPSoCs.Armin Krieg, Johannes Grinschgl, Christian Steger, Reinhold Weiss, Andreas Genser, Holger Bock, Josef Haid
2012Time-division multiplexing for testing SoCs with DVS and multiple voltage islands.Xrysovalantis Kavousianos, Krishnendu Chakrabarty, Arvind Jain, Rubin A. Parekhji
2012Embedded synthetic instruments for Board-Level testing.Artur Jutman, Sergei Devadze, Igor Aleksejev, Thomas Wenzel
2012Bandwidth-aware test compression logic for SoC designs.Jakub Janicki, Jerzy Tyszer, Grzegorz Mrugalski, Janusz Rajski
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