| 2011 | On High-Quality Test Pattern Selection and Manipulation. | Feng Yuan, Xiao Liu, Qiang Xu |
| 2011 | Temperature-Variation-Aware Test Pattern Optimization. | Tomokazu Yoneda, Makoto Nakao, Michiko Inoue, Yasuo Sato, Hideo Fujiwara |
| 2011 | Fast and Accurate DPPM Computation Using Model Based Filtering. | Ender Yilmaz, Sule Ozev |
| 2011 | A Novel SRAM-Cell Based Input Vector Monitoring Concurrent BIST Architecture. | Ioannis Voyiatzis, Costas Efstathiou, Hera Antonopoulou |
| 2011 | Analysis and Mitigation of Electromigration in RF Circuits: An LNA Case Study. | Ramachandran Venkatasubramanian, Doohwang Chang, Sule Ozev |
| 2011 | A Functional Power Evaluation Flow for Defining Test Power Limits during At-Speed Delay Testing. | Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Ernesto Snchez, Mauricio de Carvalho, Matteo Sonza Reorda |
| 2011 | Layer Redundancy Based Yield Improvement for 3D Wafer-to-Wafer Stacked Memories. | Mottaqiallah Taouil, Said Hamdioui |
| 2011 | A Mixed-Signal Test Bus and Analog BIST with 'Unlimited' Time and Voltage Resolution. | Stephen K. Sunter, Aubin Roy |
| 2011 | Toggle-Based Masking Scheme for Clustered Unknown Response Bits. | Ozgur Sinanoglu |
| 2011 | A Hardware-Based Approach for Fault Detection in RTOS-Based Embedded Systems. | Dhiego Silva, Kleber Stangherlin, Letcia Maria Veiras Bolzani, Fabian Vargas |
| 2011 | Input/Output Pad for Direct Contact and Contactless Testing. | Mauro Scandiuzzo, Salvatore Cani, Luca Perugini, Simone Spolzino, Roberto Canegallo, Luca Perilli, Roberto Cardu, Eleonora Franchi, C. Gozzi, F. Maggioni |
| 2011 | Constraint-Based Hierarchical Untestability Identification for Synchronous Sequential Circuits. | Jaan Raik, Anna Rannaste, Maksim Jenihhin, Taavi Viilukas, Raimund Ubar, Hideo Fujiwara |
| 2011 | On Transition Fault Diagnosis Using Multicycle At-Speed Broadside Tests. | Irith Pomeranz |
| 2011 | Towards Variation-Aware Test Methods. | Ilia Polian, Bernd Becker, Sybille Hellebrand, Hans-Joachim Wunderlich, Peter C. Maxwell |
| 2011 | Tomographic Testing and Validation of Probabilistic Circuits. | Alexandru Paler, Armin Alaghi, Ilia Polian, John P. Hayes |
| 2011 | F-Scan Test Generation Model for Delay Fault Testing at RTL Using Standard Full Scan ATPG. | Marie Engelene J. Obien, Satoshi Ohtake, Hideo Fujiwara |
| 2011 | I-BIRAS: Interconnect Built-In Self-Repair and Adaptive Serialization in 3D Integrated Systems. | Michael Nicolaidis, Vladimir Pasca, Lorena Anghel |
| 2011 | An Approach for Quantifying Path Correlation in Digital Circuits without any Path or Segment Enumeration. | Stelios Neophytou, Kyriakos Christou, Maria K. Michael |
| 2011 | Extraction of EVM from Transmitter System Parameters. | Afsaneh Nassery, Sule Ozev, Marian Verhelst, Mustapha Slamani |
| 2011 | Dual Edge Triggered Flip-Flops for Noise Aware Design. | Yukiya Miura |
| 2011 | AVF Analysis Acceleration via Hierarchical Fault Pruning. | Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
| 2011 | High-Performance Diagnostic Fault Simulation on GPUs. | Min Li, Michael S. Hsiao |
| 2011 | FPGA Soft Error Recovery Mechanism with Small Hardware Overhead. | Uros Legat, Anton Biasizzo, Franc Novak |
| 2011 | Viterbi-Based Efficient Test Data Compression. | Dongsoo Lee, Kaushik Roy |
| 2011 | A Low-Cost Emulation System for Fast Co-verification and Debug. | Jorge Luis Lagos-Benites, Michelangelo Grosso, Luca Sterpone, Matteo Sonza Reorda, G. Audisio, M. Pipponzi, Marco Sabatini |