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IEEE European Test Symposium

ETS

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

1,163

1999–2026

Papers per year

199968 peak2026

ETS papers

1,163 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2010Plenary presentations: Keynote: The product complexity and test - How product complexity impacts test industry.Michael Campbell
2010Algorithm-based fault tolerance for many-core architectures.Claus Braun, Hans-Joachim Wunderlich
2010Evaluation of concurrent error detection techniques on the Advanced Encryption Standard.Kaouthar Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2010Increasing reliability of programmable mixed-signal systems by applying design diversity redundancy.Gabriel de M. Borges, Luiz Fernando Gonalves, Tiago R. Balen, Marcelo Lubaszewski
2010An integrated flow for the design of hardened circuits on SRAM-based FPGAs.Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Niccol Battezzati, Luca Sterpone, Massimo Violante
2010An adaptive tester architecture for volume diagnosis.Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda
2010Diagnosis of failing scan cells through orthogonal response compaction.Brady Benware, Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer
2010Low-cost signature test of RF blocks based on envelope response analysis.Manuel J. Barragan Asian, Rafaella Fiorelli, Diego Vzquez, Adoracin Rueda, Jos Luis Huertas
2010Test power reduction in compression-based reconfigurable scan architectures.Sobeeh Almukhaizim, Mohammad Gh. Mohammad, Mohammad Khajah
2010Reconfigurable Concurrent Error Detection adaptive to dynamicity of power constraints.Sobeeh Almukhaizim, Sara Bunian, Ozgur Sinanoglu
2010Add-on blocks and algorithms for improving stimulus compression.Nader Alawadhi, Ozgur Sinanoglu, Mohammed Al-Mulla
2010Modified T-Flip-Flop based scan cell for RAS.Raghavendra Adiga, Gandhi Arpit, Virendra Singh, Kewal K. Saluja, Adit D. Singh
2010Sensors for built-in alternate RF test.Louay Abdallah, Haralampos-G. D. Stratigopoulos, Christophe Kelma, Salvador Mir
2009On Minimization of Peak Power for Scan Circuit during Test.Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Vishwani D. Agrawal
2009Critical Path Selection for Delay Test Considering Coupling Noise.Rajeshwary Tayade, Jacob A. Abraham
2009Defect Filter for Alternate RF Test.Haralampos-G. D. Stratigopoulos, Salvador Mir, Erkan Acar, Sule Ozev
2009A Two Phase Approach for Minimal Diagnostic Test Set Generation.Mohammed Ashfaq Shukoor, Vishwani D. Agrawal
2009Algorithms for ADC Multi-site Test with Digital Input Stimulus.Xiaoqin Sheng, Hans G. Kerkhoff, Amir Zjajo, Guido Gronthoud
2009Categorizing and Analysis of Activated Faults in the FlexRay Communication Controller Registers.Yasser Sedaghat, Seyed Ghassem Miremadi
2009A Voltage-Mode Testing Method to Detect IDDQ Defects in Digital Circuits.Josep Rius, Luis Elvira Villagra, Maurice Meijer
2009We Have Got Compression, What Next?Janusz Rajski
2009Masking of X-values by Use of a Hierarchically Configurable Register.Thomas Rabenalt, Michael Gssel, Andreas Leininger
2009Input Cubes with Lingering Synchronization Effects and their Use in Random Sequential Test Generation.Irith Pomeranz, Sudhakar M. Reddy
2009Novel Solution for the Built-in Gate Oxide Stress Test of LDMOS in Integrated Circuits for Automotive Applications.Vezio Malandruccolo, Mauro Ciappa, Wolfgang Fichtner, Hubert Rothleitner
2009Something I Always Wanted to Know About Test, But Was Afraid to Ask.Christian Landrault
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