| 2006 | Improving performance and robustness of domain-specific CPLDs. | Mark Holland, Scott Hauck |
| 2006 | Evaluation of granularity on threshold voltage control in flex power FPGA. | Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike |
| 2006 | Jaguar: a compiler infrastructure for Java reconfigurable computing. | Youngsun Han, Seokjoong Hwang, Seon Wook Kim |
| 2006 | FPGA based RAID 6 hardware accelerator. | Michael P. Gilroy, James Irvine, William Berrie |
| 2006 | Post-placement interconnect entropy. | Wenyi Feng, Jonathan W. Greene |
| 2006 | Armada: timing-driven pipeline-aware routing for FPGAs. | Kenneth Eguro, Scott Hauck |
| 2006 | Periodic licensing of FPGA based intellectual property. | Nathaniel Couture, Kenneth B. Kent |
| 2006 | Optimality study of logic synthesis for LUT-based FPGAs. | Jason Cong, Kirill Minkovich |
| 2006 | Modeling the data-dependent performance of pattern-matching architectures. | Christopher R. Clark, David E. Schimmel |
| 2006 | Building a flexible and scalable DRAM interface for networking applications on FPGAs. | Jike Chong, Chidamber Kulkarni, Gordon J. Brebner |
| 2006 | Context-free-grammar based token tagger in reconfigurable devices. | Young H. Cho, James Moscola, John W. Lockwood |
| 2006 | Yield enhancements of design-specific FPGAs. | Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko |
| 2006 | Magnetic tunnelling junction based FPGA. | Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon |
| 2006 | Embedded floating-point units in FPGAs. | Michael J. Beauchamp, Scott Hauck, Keith D. Underwood, K. Scott Hemmert |
| 2006 | An adaptive Reed-Solomon errors-and-erasures decoder. | Lilian Atieno, Jonathan Allen, Dennis Goeckel, Russell Tessier |
| 2006 | Reconfigurable computing with multiscale data fusion for remote sensing. | Vikas Aggarwal, Alan D. George, K. Clint Slatton |
| 2005 | Evaluating heuristics in automatically mapping multi-loop applications to FPGAs. | Heidi E. Ziegler, Mary W. Hall |
| 2005 | Sparse Matrix-Vector multiplication on FPGAs. | Ling Zhuo, Viktor K. Prasanna |
| 2005 | Domain Specific Non-Uniform Routing Architecture for Embedded Programmable IP Core (abstract only). | Wen Yujie, Jiarong Tong, Charles C. Chiang |
| 2005 | Design and implementation of packet classification with FPGA (abstract only). | Yong-Gang Wang, Tian-Xin Yan |
| 2005 | Using bus-based connections to improve field-programmable gate array density for implementing datapath circuits. | Andy Gean Ye, Jonathan Rose |
| 2005 | Skew-programmable clock design for FPGA and skew-aware placement. | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
| 2005 | A constant array multiplier core generator with dynamic partial evaluation architecture selection (abstract only). | Bo Yang, Nikhil Joshi, Ramesh Karri |
| 2005 | Image processing library for reconfigurable computers (abstract only). | Mohamed Taher, Esam El-Araby, Tarek A. El-Ghazawi, Kris Gaj |
| 2005 | Routing algorithms: enhancing routability & enabling ECO (abstract only). | Taraneh Taghavi, Soheil Ghiasi, Majid Sarrafzadeh |