| 2004 | A quantitative analysis of the speedup factors of FPGAs over processors. | Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vissers |
| 2004 | Reducing leakage energy in FPGAs using region-constrained placement. | Aman Gayasen, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan |
| 2004 | A novel coarse-grain reconfigurable data-path for accelerating DSP kernels. | Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis |
| 2004 | A magnetoelectronic macrocell employing reconfigurable threshold logic. | Steve Ferrera, Nicholas P. Carter |
| 2004 | FPGA-based implementation of single-precision exponential unit. | Christopher C. Doss, Robert L. Riley Jr. |
| 2004 | Hardware co-simulation in system generator of the AES-128 encryption algorithm. | Daniel Denning, Malachy Devlin, James Irvine |
| 2004 | Nanowire-based sublithographic programmable logic arrays. | Andr DeHon, Michael J. Wilson |
| 2004 | What is the right model for programming and using modern FPGAs? | Andr DeHon, Brad L. Hutchings, Daryl Rudusky, James Hwang, Nikhil, Salil Raje, Adrian Stoica |
| 2004 | FPGA modelling for high-performance algorithms. | Martin Danek, Josef Kolr |
| 2004 | A synthesis oriented omniscient manual editor. | Tomasz S. Czajkowski, Jonathan Rose |
| 2004 | Application-specific instruction generation for configurable processor architectures. | Jason Cong, Yiping Fan, Guoling Han, Zhiru Zhang |
| 2004 | Flexibility measurement of domain-specific reconfigurable hardware. | Katherine Compton, Scott Hauck |
| 2004 | Subframe multiplexing for FPGA manufacturing test configuration. | Erik Chmelar |
| 2004 | An FPGA implementation of the two-dimensional finite-difference time-domain (FDTD) algorithm. | Wang Chen, Panos Kosmas, Miriam Leeser, Carey M. Rappaport |
| 2004 | Low-power technology mapping for FPGA architectures with dual supply voltages. | Deming Chen, Jason Cong, Fei Li, Lei He |
| 2004 | Least-significant bit optimization techniques for FPGAs. | Mark L. Chang, Scott Hauck |
| 2004 | A flexible hardware architecture for 2-D discrete wavelet transform. | Richard Carbone, Andreas E. Savakis |
| 2004 | High-speed systolic array for gene matching. | Gabriel Caffarena, Slobodan Bojanic, Juan A. Lpez, Carlos E. Pedreira, Octavio Nieto-Taladriz |
| 2004 | An FPGA prototype for the experimental evaluation of a multizone network cache. | Paul Berube, Jos Nelson Amaral, Mike H. MacGregor |
| 2004 | Time and area efficient pattern matching on FPGAs. | Zachary K. Baker, Viktor K. Prasanna |
| 2004 | Implementation of elliptic curve cryptosystems over GF(2 | Sashisu Bajracharya, Chang Shu, Kris Gaj, Tarek A. El-Ghazawi |
| 2004 | Active leakage power optimization for FPGAs. | Jason Helge Anderson, Farid N. Najm, Tim Tuan |
| 2003 | A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme. | Kuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda |
| 2003 | Hardware-assisted simulated annealing with application for fast FPGA placement. | Michael G. Wrighton, Andr DeHon |
| 2003 | Post-placement C-slow retiming for the xilinx virtex FPGA. | Nicholas Weaver, Yury Markovsky, Yatish Patel, John Wawrzynek |