| 2003 | Application-dependent testing of FPGAs for bridging faults. | Mehdi Baradaran Tahoori |
| 2003 | A high resolution diagnosis technique for open and short defects in FPGA interconnects. | Mehdi Baradaran Tahoori |
| 2003 | A physical retiming algorithm for field programmable gate arrays. | Peter Suaris, Dongsheng Wang, Pei-Ning Guo, Nan-Chi Chou |
| 2003 | A methodology to implement block ciphers in reconfigurable hardware and its application to fast and compact AES RIJNDAEL. | Franois-Xavier Standaert, Gal Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat |
| 2003 | PipeRoute: a pipelining-aware router for FPGAs. | Akshay Sharma, Carl Ebeling, Scott Hauck |
| 2003 | Design of FPGA interconnect for multilevel metalization. | Raphael Rubin, Andr DeHon |
| 2003 | Design strategies and modified descriptions to optimize cipher FPGA implementations: fast and compact results for DES and triple-DES. | Gal Rouvroy, Franois-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat |
| 2003 | High-level modeling and FPGA prototyping of microprocessors. | Joydeep Ray, James C. Hoe |
| 2003 | Wireless sensor networks: a power-scalable motion estimation IP for hybrid video coding. | Federico Quaglio, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Molino, Gianluca Piccinini, Maurizio Zamboni |
| 2003 | Lattice adaptive filter implementation for FPGA. | Zdenek Pohl, Rudolf Matousek, Jiri Kadlec, Milan Tich, Miroslav Lcko |
| 2003 | Automatic transistor and physical design of FPGA tiles from an architectural specification. | Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron Egier, Jonathan Rose |
| 2003 | I/O placement for FPGAs with multiple I/O standards. | Wai-Kei Mak |
| 2003 | A pipelined configurable gate array for embedded processors. | Andrea Lodi, Mario Toma, Fabio Campi |
| 2003 | Reducing pin and area overhead in fault-tolerant FPGA-based designs. | Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz Reis |
| 2003 | Architecture evaluation for power-efficient FPGAs. | Fei Li, Deming Chen, Lei He, Jason Cong |
| 2003 | The Stratix | David M. Lewis, Vaughn Betz, David Jefferson, Andy Lee, Christopher Lane, Paul Leventis, Sandy Marquardt, Cameron McClintock, Bruce Pedersen, Giles Powell, Srinivas Reddy, Chris Wysocki, Richard Cliff, Jonathan Rose |
| 2003 | An FPGA architecture with enhanced datapath functionality. | Katarzyna Leijten-Nowak, Jef L. van Meerbergen |
| 2003 | Wire type assignment for FPGA routing. | Seokjin Lee, Hua Xiang, D. F. Wong, Richard Y. Sun |
| 2003 | An FPGA architecture with built-in error correction capability. | Parag K. Lala, B. Kiran Kumar |
| 2003 | Synthetic circuit generation using clustering and iteration. | Paul D. Kundarewich, Jonathan Rose |
| 2003 | Reconfigurable randomized K-way graph partitioning. | Fatih Kocan |
| 2003 | Architectures and algorithms for synthesizable embedded programmable logic cores. | Noha Kafafi, Kimberly A. Bozman, Steven J. E. Wilton |
| 2003 | An automated and power-aware framework for utilization of IP cores in hardware generated from C descriptions targeting FPGAs. | Alex K. Jones, Prithviraj Banerjee |
| 2003 | A fully pipelined memoryless 17.8 Gbps AES-128 encryptor. | Kimmo U. Jrvinen, Matti Tommiska, Jorma Skytt |
| 2003 | Stochastic, spatial routing for hypergraphs, trees, and meshes. | Randy Huang, John Wawrzynek, Andr DeHon |