| 2020 | A High-Performance Out-of-Order Soft Processor Without Register Renaming. | Satoshi Mitsuno, Junichiro Kadomoto, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai |
| 2020 | A Service-Oriented Memory Architecture for FPGA Computing. | Joseph Melber, James C. Hoe |
| 2020 | A Seamless DFT/FFT Self-Adaptive Architecture for Embedded Radar Applications. | Julien Mazuet, Michel Narozny, Catherine Dezan, Jean-Philippe Diguet |
| 2020 | Transparent Integration of a Dynamic FPGA Database Acceleration System. | Kaspar Mtas, Dirk Koch |
| 2020 | Resource Elastic Database Acceleration. | Kristiyan Manev, Dirk Koch |
| 2020 | Learn the Switches: Evolving FPGA NoCs with Stall-Free and Backpressure Based Routers. | Gurshaant Malik, Ian Elmor Lang, Rodolfo Pellizzoni, Nachiket Kapre |
| 2020 | X-Attack: Remote Activation of Satisfiability Don't-Care Hardware Trojans on Shared FPGAs. | Dina G. Mahmoud, Wei Hu, Mirjana Stojilovic |
| 2020 | A Deep-Learning Framework for Predicting Congestion During FPGA Placement. | Dani Maarouf, Ahmed Shamli, Timothy Martin, Gary Grwal, Shawki Areibi |
| 2020 | Hardware Acceleration of Monte-Carlo Sampling for Energy Efficient Robust Robot Manipulation. | Yanqi Liu, Giuseppe Calderoni, Ruth Iris Bahar |
| 2020 | Endurance-Aware RRAM-Based Reconfigurable Architecture using TCAM Arrays. | Joo Paulo Cardoso de Lima, Marcelo Brandalero, Luigi Carro |
| 2020 | Automated Design of FPGAs Facilitated by Cycle-Free Routing. | Ang Li, Ting-Jung Chang, David Wentzlaff |
| 2020 | RISC-V FPGA Platform Toward ROS-Based Robotics Application. | Jaewon Lee, Hanning Chen, Jeffrey S. Young, Hyesoon Kim |
| 2020 | Demo: A Closer Look at Malicious Bitstreams. | Tuan La, Kaspar Matas, Joseph Powell, Khoa Dang Pham, Dirk Koch |
| 2020 | Securing FPGA Accelerators at the Electrical Level for Multi-tenant Platforms. | Tuan La, Kaspar Matas, Khoa Dang Pham, Dirk Koch |
| 2020 | An FPGA-Based Low-Latency Accelerator for Randomly Wired Neural Networks. | Ryosuke Kuramochi, Hiroki Nakahara |
| 2020 | HyperLogLog Sketch Acceleration on FPGA. | Amit Kulkarni, Monica Chiosa, Thomas B. Preuer, Kaan Kara, David Sidler, Gustavo Alonso |
| 2020 | MCEA: A Resource-Aware Multicore CGRA Architecture for the Edge. | Guilherme Korol, Michael Guilherme Jordan, Marcelo Brandalero, Michael Hbner, Mateus Beck Rutzig, Antonio Carlos Schneider Beck |
| 2020 | A High Throughput MobileNetV2 FPGA Implementation Based on a Flexible Architecture for Depthwise Separable Convolution. | Justin Knapheide, Benno Stabernack, Maximilian Kuhnke |
| 2020 | Accelerating Local Laplacian Filters on FPGAs. | Shashwat Khandelwal, Ziaul Choudhury, Shashwat Shrivastava, Suresh Purini |
| 2020 | High Bandwidth Memory on FPGAs: A Data Analytics Perspective. | Kaan Kara, Christoph Hagleitner, Dionysios Diamantopoulos, Dimitris Syrivelis, Gustavo Alonso |
| 2020 | RANTT: A RISC-V Architecture Extension for the Number Theoretic Transform. | Emre Karabulut, Aydin Aysu |
| 2020 | A Domain-Specific Architecture for Accelerating Sparse Matrix Vector Multiplication on FPGAs. | Abhishek Kumar Jain, Hossein Omidian, Henri Fraisse, Mansimran Benipal, Lisa Liu, Dinesh Gaitonde |
| 2020 | Lightweight Side-Channel Protection using Dynamic Clock Randomization. | Benjamin Hettwer, Kallyan Das, Sebastien Leger, Stefan Gehrer, Tim Gneysu |
| 2020 | A Hardware/Software Co-Design of K-mer Counting Using a CAPI-Enabled FPGA. | Abbas Haghi, Lluc Alvarez, Jord Polo, Dionysios Diamantopoulos, Christoph Hagleitner, Miquel Moret |
| 2020 | Exploring FPGA Optimizations in OpenCL for Breadth-First Search on Sparse Graph Datasets. | Atharva Gondhalekar, Wu-Chun Feng |