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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2017Reliable SEU monitoring and recovery using a programmable configuration controller.Lingkan Gong, Alexander Kroh, Dimitris Agiakatsikas, Nguyen T. H. Nguyen, Ediz Cetin, Oliver Diessel
2017Voltage drop-based fault attacks on FPGAs using valid bitstreams.Dennis R. E. Gnad, Fabian Oboril, Mehdi Baradaran Tahoori
2017Toward a pixel-parallel architecture for graph cuts inference on FPGA.Tianqi Gao, Jungwook Choi, Shang-nien Tsai, Rob A. Rutenbar
2017OpenSoC system architect: An open toolkit for building soft-cores on FPGAs.Farzad Fatollahi-Fard, David Donofrio, John Shalf, John D. Leidel, Xi Wang, Yong Chen
2017F-C3D: FPGA-based 3-dimensional convolutional neural network.Hongxiang Fan, Xinyu Niu, Qiang Liu, Wayne Luk
2017FPGA modeling techniques for detecting and demodulating multiple wireless protocols.Benjamin Drozdenko, Suranga Handagala, Kaushik R. Chowdhury, Miriam Leeser
2017Broken-Karatsuba multiplication and its application to Montgomery modular multiplication.Jinnan Ding, Shuguo Li
2017Determine the carry bit of carry-sum generated by unsigned MBE multiplier without final addition.Jinnan Ding, Shuguo Li
2017PolyPC: Polymorphic parallel computing framework on embedded reconfigurable system.Hongyuan Ding, Miaoqing Huang
2017Comparison of hardware and software implementations of selected lightweight block ciphers.William Diehl, Farnoud Farahmand, Panasayya Yalla, Jens-Peter Kaps, Kris Gaj
2017One size does not fit all: Implementation trade-offs for iterative stencil computations on FPGAs.Gal Deest, Tomofumi Yuki, Sanjay V. Rajopadhye, Steven Derrien
2017STRIPE: Signal selection for runtime power estimation.James J. Davis, Joshua M. Levine, Edward A. Stott, Eddie Hung, Peter Y. K. Cheung, George A. Constantinides
2017In-network online data analytics with FPGAs.Ryan A. Cooke, Suhaib A. Fahmy
2017Complete activation scheme for FPGA-oriented IP cores design protection.Brice Colombier, Ugo Mureddu, Marek Laban, Oto Petura, Lilian Bossuet, Viktor Fischer
2017A pythonic approach for rapid hardware prototyping and instrumentation.John Clow, Georgios Tzimpragos, Deeksha Dangwal, Sammy Guo, Joseph McMahan, Timothy Sherwood
2017Automated generation of banked memory architectures in the high-level synthesis of multi-threaded software.Yu Ting Chen, Jason Helge Anderson
2017Functional & timing in-hardware verification of FPGA-based designs using unit testing frameworks.Julin Caba, Fernando Rincn, Julio Dondo Gazzano
2017Accelerating in-system FPGA debug of high-level synthesis circuits using incremental compilation techniques.Pavan Kumar Bussa, Jeffrey Goeders, Steven J. E. Wilton
2017Deploying FPGAs to future-proof genome-wide analyses based on linkage disequilibrium.Dimitrios Bozikas, Nikolaos Alachiotis, Pavlos Pavlidis, Euripides Sotiriades, Apostolos Dollas
2017"All programmable FPGA, providing hardware efficiency to software programmers".Ivo Bolsens
2017A high-performance system-on-chip architecture for direct tracking for SLAM.Konstantinos Boikos, Christos-Savvas Bouganis
2017An FPGA hardware implementation approach for a phylogenetic tree reconstruction algorithm with incremental tree optimization.Henry Block, Tsutomu Maruyama
2017Line rate programmable packet processing in 100Gb networks.Pavel Bencek, Viktor Pus, Jan Korenek, Michal Kekely
2017On accelerating pair-HMM computations in programmable hardware.Subho S. Banerjee, Mohamed El-Hadedy, Ching Y. Tan, Zbigniew T. Kalbarczyk, Steven S. Lumetta, Ravishankar K. Iyer
2017Versatile deployment of FPGA accelerators in disaggregated data centers: A bioinformatics case study.Nikolaos Alachiotis, Dimitris Theodoropoulos, Dionisios N. Pnevmatikatos
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