| 2012 | Architecture and FPGA implementation of a 10.7 Gbit/s OTN Regenerator for optical communication systems. | Rodrigo Bernardo, Luis R. Monte, Eduardo Mobilon, Valentino Corso, Arley H. Salvador, Carolina G. Neves, Cleber A. Nakandakare, Daniele R. da Silva, Luis P. F. de Barros, Ronaldo F. da Silva |
| 2012 | Bil: A tool-chain for bitstream reverse-engineering. | Florian Benz, Andr Seffrin, Sorin A. Huss |
| 2012 | On reconfigurable fabrics and generic side-channel countermeasures. | Robert Beat, Philipp Grabher, Daniel Page, Stefan Tillich, Marcin Wjcik |
| 2012 | Design of a novel Quantum-dot Cellular Automata Field Programmable Gate Array. | Hemant Balijepalli, Mohammed Y. Niamat |
| 2012 | FPGA-based design and implementation of a multi-GBPS LDPC decoder. | Alexios Balatsoukas-Stimming, Apostolos Dollas |
| 2012 | High-level aging estimation for FPGA-mapped designs. | Abdulazim Amouri, Mehdi Baradaran Tahoori |
| 2012 | Acceleration of distance-to-default with hardware-software co-design. | Izaan Allugundu, Pranay Puranik, Yat Piu Lo, Akash Kumar |
| 2012 | Reconfigurable out-of-order mechanism generator for unstructured grid computation in computational fluid dynamics. | Takayuki Akamine, Kenta Inakagata, Yasunori Osana, Naoyuki Fujita, Hideharu Amano |
| 2012 | Performance analysis of fully-adaptable CRC accelerators on an FPGA. | Amila Akagic, Hideharu Amano |
| 2012 | A resiliency-aware scheduling approach for FPGA configuration: Preliminary results. | Jeremy Abramson, Pedro C. Diniz |
| 2012 | Automatically exploiting regularity in applications to reduce reconfiguration memory requirements. | Fatma Abouelella, Karel Bruneel, Dirk Stroobandt |
| 2011 | On Timing Yield Improvement for FPGA Designs Using Architectural Symmetry. | Haile Yu, Qiang Xu, Philip Heng Wai Leong |
| 2011 | Unifying Partitioning and Placement for SAT-Based Exploration of Heterogeneous Reconfigurable SoCs. | Stefan Wildermann, Jrgen Teich, Daniel Ziener |
| 2011 | Dependable Optically Reconfigurable Gate Array with a Phase-Modulation Type Holographic Memory. | Takahiro Watanabe, Minoru Watanabe |
| 2011 | FPGA Interconnect Architecture Exploration Based on a Statistical Model. | Zhen Wang, Ding Xie, Jinmei Lai |
| 2011 | An Efficient Hardware Matching Engine for Regular Expression with Nested Kleene Operators. | Yoichi Wakaba, Masato Inagi, Shin'ichi Wakabayashi, Shinobu Nagayama |
| 2011 | Revisiting the Newton-Raphson Iterative Method for Decimal Division. | Mrio P. Vstias, Horcio C. Neto |
| 2011 | Improving Security of SDDL Designs through Interleaved Placement on Xilinx FPGAs. | Rajesh Velegalati, Jens-Peter Kaps |
| 2011 | An Implementation of the Mean Shift Filter on FPGA. | Dang Ba Khac Trieu, Tsutomu Maruyama |
| 2011 | A Run-Time Adaptive FPGA Architecture for Monte Carlo Simulations. | Xiang Tian, Christos-Savvas Bouganis |
| 2011 | Precore - A Token-Based Speculation Architecture for High-Level Language to Hardware Compilation. | Benjamin Thielmann, Jens Huthmann, Andreas Koch |
| 2011 | Latch-Based Performance Optimization for FPGAs. | Bill Teng, Jason Helge Anderson |
| 2011 | Synthesizing Tiled Matrix Decomposition on FPGAs. | Yi-Gang Tai, Kleanthis Psarris, Chia-Tien Dan Lo |
| 2011 | Improving FPGA Reliability with Wear-Levelling. | Edward A. Stott, Peter Y. K. Cheung |
| 2011 | Implementation in FPGA of Address-Based Data Sorting. | Valery Sklyarov, Iouliia Skliarova, Dmitri Mihhailov, Alexander Sudnitson |