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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2011Multi-module Hashing System for SHA-3 & FPGA Integration.Nicolas Sklavos
2011A Methodology and Tool Framework for Supporting Rapid Exploration of Memory Hierarchies in FPGAs.Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris
2011A Framework for Architecture-Level Exploration of Communication Intensive Applications onto 3-D FPGAs.Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris
2011Implementing Stream-Processing Applications on FPGAs: A DSL-Based Approach.Jocelyn Srot, Franois Berry, Sameer Ahmed
2011A Dynamically-Reconfigurable Phased Array Radar Processing System.Emmanuel Seguin, Russell Tessier, Eric J. Knapp, Robert W. Jackson
2011Real-Time Evaluation of Remote Sensing Data on Board of Satellites.Kurt Schwenk, Katharina Goetz, Maria von Schoenermark, Felix Huber
2011Fast RTL Power Estimation for FPGA Designs.Paul Schumacher, Pradip Jha, Sudha Kuntur, Tim Burke, Alan Frost
2011Leros: A Tiny Microcontroller for FPGAs.Martin Schoeberl
2011Compact Hardware Architecture for Hummingbird Cryptographic Algorithm.Ismail San, Nuray At
2011An Evaluation of Selective Depipelining for FPGA-Based Energy-Reducing Irregular Code Coprocessors.Jack Sampson, Manish Arora, Nathan Goulding-Hotta, Ganesh Venkatesh, Jonathan Babb, Vikram Bhatt, Steven Swanson, Michael Bedford Taylor
2011Compact CLEFIA Implementation on FPGAS.Paulo Proenca, Ricardo Chaves
2011Pipelined Floating-Point Architecture for a Phase and Magnitude Detector Based on CORDIC.Surapong Pongyupinpanich, Manfred Glesner
2011Resource Management for the Heterogeneous Arrays of Hardware Accelerators.Zdenek Pohl, Milan Tich
2011Mechanisms and Architecture for the Dynamic Reconfiguration of an Advanced Wireless Sensor Node.Franois Philipp, Manfred Glesner
2011Hardware Support for Broadcast and Reduce in MPSoC.Yuanxi Peng, Manuel Saldaa, Paul Chow
2011Molecular Docking on FPGA and GPU Platforms.Imre Pechan, Bla Fehr
2011Measuring and Reducing the Performance Gap between Embedded and Soft Multipliers on FPGAs.Hadi Parandeh-Afshar, Paolo Ienne
2011Run-Time Scalable Architecture for Deblocking Filtering in H.264/AVC-SVC Video Codecs.Andrs Otero, Eduardo de la Torre, Teresa Riesgo, Teresa Cervero, Sebastin Lpez, Gustavo M. Callic, Roberto Sarmiento
2011Reconfiguring Distributed Applications in FPGA Accelerated Cluster with Wireless Networking.Xinyu Niu, Kuen Hung Tsoi, Wayne Luk
2011FPGA-Specific Arithmetic Optimizations of Short-Latency Adders.Hong Diep Nguyen, Bogdan Pasca, Thomas B. Preuer
2011Remote FPGA Lab with Interactive Control and Visualisation Interface.Fearghal Morgan, Seamus Cawley, Frank Callaly, Shane Agnew, Patrick Rocke, Martin O'Halloran, Nina Drozd, Krzysztof Kepa, Brian McGinley
2011A Coarse Grain Reconfigurable Processor Architecture for Stream Processing Engine.Takefumi Miyoshi, Hideyuki Kawashima, Yuta Terada, Tsutomu Yoshinaga
2011Embedded Systems Start-Up under Timing Constraints on Modern FPGAs.Joachim Meyer, Juanjo Noguera, Michael Hbner, Rodney Stewart, Jrgen Becker
2011Exploitation of Parallel Search Space Evaluation with FPGAs in Combinatorial Problems: The Eternity II Case.Pavlos Malakonakis, Apostolos Dollas
2011The Impact of Aging on an FPGA-Based Physical Unclonable Function.Abhranil Maiti, Logan McDougall, Patrick Schaumont
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