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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2011Generic Low-Latency NoC Router Architecture for FPGA Computing Systems.Ye Lu, John V. McCanny, Sakir Sezer
2011FlexCache: Field Extensible Cache Controller Architecture Using On-chip Reconfigurable Fabric.Daniel Lo, Greg Malysa, G. Edward Suh
2011Separable FIR Filtering in FPGA and GPU Implementations: Energy, Performance, and Accuracy Considerations.Daniel Llamocca, Cesar Carranza, Marios S. Pattichis
2011A Model for Matrix Multiplication Performance on FPGAs.Colin Yu Lin, Hayden Kwok-Hay So, Philip Heng Wai Leong
2011FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Activities.Will X. Y. Li, Rosa H. M. Chan, Wei Zhang, C. W. Yu, Ray C. C. Cheung, Dong Song, Theodore W. Berger
2011Software/Hardware Framework for Generating Parallel Long-Period Random Numbers Using the WELL Method.Yuan Li, Paul Chow, Jiang Jiang, Minxuan Zhang
2011Simultaneous Constrained Pin Assignment and Escape Routing for FPGA-PCB Codesign.Seong-I Lei, Wai-Kei Mak
2011VPFPAP: A Special-Purpose VLIW Processor for Variable-Precision Floating-Point Arithmetic.Yuanwu Lei, Yong Dou, Jie Zhou, Sufeng Wang
2011High Frequency Trading Acceleration Using FPGAs.Christian Leber, Benjamin Geib, Heiner Litz
2011RapidSmith: Do-It-Yourself CAD Tools for Xilinx FPGAs.Christopher Lavin, Marc Padilla, Jaren Lamprecht, Philip Lundrigan, Brent E. Nelson, Brad L. Hutchings
2011Design of a High Switching Frequency FPGA-Based SPWM Generator for DC/AC Inverters.Matina Lakka, Eftichios Koutroulis, Apostolos Dollas
2011FPGA-Accelerated Object Detection Using Edge Information.Christos Kyrkou, Christos Ttofis, Theocharis Theocharides
2011A Radix Tree Router for Scalable FPGA Networks.William V. Kritikos, Yamuna Rajasekhar, Andrew G. Schmidt, Ron Sass
2011Implications of Reliability Enhancement Achieved by Fault Avoidance on Dynamically Reconfigurable Architectures.Hiroaki Konoura, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye
2011A Routing Architecture for Mapping Dataflow Graphs at Run-Time.Dirk Koch, Jim Trresen
2011Heterogeneous Platform for Stream Based Applications on FPGAs.Jan Kloub, Tomas Mazanec, Antonin Hermanek
2011Heracles: Fully Synthesizable Parameterized MIPS-Based Multicore System.Michel A. Kinsy, Michael Pellauer, Srinivas Devadas
2011ERDB: An Embedded Routing Database for Reconfigurable Systems.Krzysztof Kepa, Fearghal Morgan, Peter Athanas
2011An FPGA Solver for SAT-Encoded Formal Verification Problems.Kenji Kanazawa, Tsutomu Maruyama
2011Unifying Finite Difference Option-Pricing for Hardware Acceleration.Qiwei Jin, Wayne Luk, David B. Thomas
2011Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms.Naifeng Jing, Ju-Yueh Lee, Zhe Feng, Weifeng He, Zhigang Mao, Shi-Jie Wen, Rick Wong, Lei He
2011Methods and Mechanisms for Hardware Multitasking: Executing and Synchronizing Fully Relocatable Hardware Tasks in Xilinx FPGAs.Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Raul Torrego, Imanol Martinez
2011Improved Abstractions and Turnaround Time for FPGA Design Validation and Debug.Yousef Iskander, Cameron D. Patterson, Stephen D. Craven
2011An Easily Testable Routing Architecture and Efficient Test Technique.Kazuki Inoue, Hiroki Yosho, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi
201120Gbps C-Based Complex Event Processing.Hiroaki Inoue, Takashi Takenaka, Masato Motomura
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