| 2010 | Early Prediction of Hardware Complexity in HLL-to-HDL Translation. | Alessandro Cilardo, Paolo Durante, Carmelo Lofiego, Antonino Mazzeo |
| 2010 | A Karatsuba-Based Montgomery Multiplier. | Gary Chun Tak Chow, Ken Eguro, Wayne Luk, Philip Heng Wai Leong |
| 2010 | Parallelizing Simulated Annealing-Based Placement Using GPGPU. | Alexander Choong, Rami Beidas, Jianwen Zhu |
| 2010 | Parallelizing FPGA Technology Mapping Using Graphics Processing Units (GPUs). | Doris Chen, Deshanand P. Singh |
| 2010 | High Density Asynchronous LUT Based on Non-volatile MRAM Technology. | Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer |
| 2010 | ERCBench: An Open-Source Benchmark Suite for Embedded and Reconfigurable Computing. | Daniel W. Chang, Christipher D. Jenkins, Philip C. Garcia, Syed Zohaib Gilani, Paula Aguilera, Aishwarya Nagarajan, Michael J. Anderson, Matthew A. Kenny, Sean M. Bauer, Michael J. Schulte, Katherine Compton |
| 2010 | A Reconfigurable System Based on a Parallel and Pipelined Solution for Regular Expression Matching. | Francesco Bruschi, Marco Paolieri, Vincenzo Rana |
| 2010 | General Purpose Computing with Reconfigurable Acceleration. | Anthony Brandon, Ioannis Sourdis, Georgi Nedeltchev Gaydadjiev |
| 2010 | On Identifying Segments of Traces for Dynamic Compilation. | Joo Bispo, Joo M. P. Cardoso |
| 2010 | Short-Circuits on FPGAs Caused by Partial Runtime Reconfiguration. | Christian Beckhoff, Dirk Koch, Jim Trresen |
| 2010 | Investigation of a Masking Countermeasure against Side-Channel Attacks for RISC-based Processor Architectures. | Lyonel Barthe, Pascal Benoit, Lionel Torres |
| 2010 | FPGA Implementations of the Round Two SHA-3 Candidates. | Brian Baldwin, Andrew Byrne, Liang Lu, Mark Hamilton, Neil Hanley, Mire O'Neill, William P. Marnane |
| 2010 | IP Based Configurable SIMD Massively Parallel SoC. | Mouna Baklouti, Mohamed Abid, Philippe Marquet, Jean-Luc Dekeyser |
| 2010 | Thermal Gradient Aware Clock Skew Scheduling for FPGAs. | Sungmin Bae, Narayanan Vijaykrishnan |
| 2010 | An IEEE 754-2008 Decimal Parallel and Pipelined FPGA Floating-Point Multiplier. | Malte Baesler, Sven-Ole Voigt, Thomas Teufel |
| 2010 | Design and FPGA Implementation of a 2nd Order Adaptive Delta Sigma Modulator with One Bit Quantization. | Shahrukh Athar, Muhammad Ali Siddiqi, Shahid Masud |
| 2010 | Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis. | Adam Arnesen, Kevin Ellsworth, Derrick Gibelyou, Travis Haroldsen, Jared Havican, Marc Padilla, Brent E. Nelson, Michael Rice, Michael J. Wirthlin |
| 2010 | NIFD: Non-intrusive FPGA Debugger -- Debugging FPGA 'Threads' for Rapid HW/SW Systems Prototyping. | Hari Angepat, Gage Eads, Christopher Craik, Derek Chiou |
| 2010 | Survey of New Trends in Industry for Programmable Hardware: FPGAs, MPPAs, MPSoCs, Structured ASICs, eFPGAs and New Wave of Innovation in FPGAs. | Syed Zahid Ahmed, Gilles Sassatelli, Lionel Torres, Laurent Rouge |
| 2010 | Pixel Similarity Based Computation and Power Reduction Technique for H.264 Intra Prediction. | Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu |
| 2010 | Efficiently Generating FPGA Configurations through a Stack Machine. | Fatma Abouelella, Karel Bruneel, Dirk Stroobandt |
| 2010 | Design and Implementation of an Object-Oriented Framework for Dynamic Partial Reconfiguration. | Norbert Abel |
| 2009 | A biophysically accurate floating point somatic neuroprocessor. | Yiwei Zhang, Jos L. Nez-Yez, Joe McGeehan, Edward Regan, Stephen Kelly |
| 2009 | High-level programming of coarse-grained reconfigurable architectures. | Zain-ul-Abdin |
| 2009 | Tracking elephant flows in internet backbone traffic with an FPGA-based cache. | Martin Zdnk, Marco Canini, Andrew W. Moore, David J. Miller, Wei Li |