| 2006 | Power Implications of Implementing Logic Using FPGA Embedded Memory Arrays. | Scott Y. L. Chin, Clarence S. P. Lee, Steven J. E. Wilton |
| 2006 | FPGA Performance Optimization Via Chipwise Placement Considering Process Variations. | Lerong Cheng, Jinjun Xiong, Lei He, Mike Hutton |
| 2006 | Power Reduction for FPGA Implementations : Design Optimisation and High Level Modelling. | Shrutisagar Chandrasekaran, Abbes Amira |
| 2006 | FPGA Implementation and Power Modelling of the Fast Walsh Transform. | Shrutisagar Chandrasekaran, Abbes Amira |
| 2006 | IPP Watermarking Technique for IP Core Protection on FPL Devices. | Encarnacin Castillo, Luis Parrilla, Antonio Garca, Antonio Lloris-Ruz, Uwe Meyer-Bse |
| 2006 | Reducing the Space Complexity of Pipelined Routing Using Modified Range Encoding. | Allan Carroll, Carl Ebeling |
| 2006 | Reconfiguration and Fine-Grained Redundancy for Fault Tolerance in FPGAs. | Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko |
| 2006 | High Performance Scientific Computing Using FPGAs with IEEE Floating Point and Logarithmic Arithmetic for Lattice QCD. | Owen Callanan, David Gregg, Andy Nisbet, Mike Peardon |
| 2006 | High-Level Synthesis of Multiple Word-Length DSP Algorithms Using Heterogeneous-Resource FPGAs. | Gabriel Caffarena, Juan A. Lpez, Carlos Carreras, Octavio Nieto-Taladriz |
| 2006 | Verification and FPGA Circuits of a Block-2 Fast Path-Based Predictor. | Oswaldo Cadenas, Graham M. Megson |
| 2006 | Development of IP Modules of Fuzzy Controllers for the Design of Embedded Systems on FPGAs. | Mara Brox, Santiago Snchez-Solano |
| 2006 | Optimal Simultaneous Scheduling, Binding and Routing for Processor-Like Reconfigurable Architectures. | Janina A. Brenner, Jan van der Veen, Sndor P. Fekete, Julio A. de Oliveira Filho, Wolfgang Rosenstiel |
| 2006 | Implementation in Fpgas of Jacobi Method to Solve the Eigenvalue and Eigenvector Problem. | Ignacio Bravo Muoz, Pedro Jimnez, Manuel Mazo, Jos Luis Lzaro, Alfredo Gardel Vicente |
| 2006 | FPGA-Accelerated Pre-Attentive Segmentation in Primary Visual Cortex. | Christos-Savvas Bouganis, Peter Y. K. Cheung, Zhaoping Li |
| 2006 | A Novel Partial Bitstream Merging Methodology Accelerating Xilinx Virtex-II FPGA Based RP System Setup. | Carsten Bieser, Martin Bahlinger, Matthias Heinz, Christian Stops, Klaus D. Mller-Glaser |
| 2006 | A Novel FPGA Design Acceleration Methodology Supported by a Unique RP Platform for Fast and Easy System Develpoment. | Carsten Bieser |
| 2006 | Synthesis of Analog Filters on a Continuous-Time FPAA Using a Genetic Algorithm. | Joachim Becker, Yiannos Manoli |
| 2006 | Architectural Modifications to Improve Floating-Point Unit Efficiency in FPGAs. | Michael J. Beauchamp, Scott Hauck, Keith D. Underwood, K. Scott Hemmert |
| 2006 | Reconfigurable Architectures for Curve-Based Cryptography on Embedded Micro-Controllers. | Lejla Batina, Alireza Hodjat, David Hwang, Kazuo Sakiyama, Ingrid Verbauwhede |
| 2006 | FPGA Design Considerations in the Implementation of a Fixed-Throughput Sphere Decoder for MIMO Systems. | Luis G. Barbero, John S. Thompson |
| 2006 | Memory Parallelism Using Custom Array Mapping to Heterogeneous Storage Structures. | Nastaran Baradaran, Pedro C. Diniz |
| 2006 | An Efficient Fault Tolerance Scheme for Preventing Single Event Disruptions in Reconfigurable Architectures. | Sajid Baloch, Tughrul Arslan, Adrian Stoica |
| 2006 | Predictive Load Balancing for Interconnected FPGAs. | Jason D. Bakos, Charles L. Cathey, Allen Michalski |
| 2006 | Regular Expression Software Deceleration for Intrusion Detection Systems. | Zachary K. Baker, Viktor K. Prasanna, Hong-Jip Jung |
| 2006 | Towards Affective Level Video Applications: A Novel FPGA-Based Video Arousal Content Modeling System. | Sutjipto Arifin, Peter Y. K. Cheung |