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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2005FELIX: Using Rewriting-Logic for Generating Functionally Equivalent Implementations.Carlos Morra, Jrgen Becker, Mauricio Ayala-Rincn, Reiner W. Hartenstein
2005Implementation of Ranking Filters on General Purpose and Reconfigurable Architecture Based on High Density FPGA Devices.Dragomir Milojevic
2005High-Throughput Reconfigurable Computing: A Design Study of an IDEA Encryption Cryptosystem on the SRC-6e Reconfigurable Computer.Allen Michalski, Kris Gaj, Duncan A. Buell
2005Mapping an H.264/AVC Decoder onto the ADRES Reconfigurable Architecture.Bingfeng Mei, Francisco-Javier Veredas, Bart Masschelein
2005Multidimensional Dynamic Programming for Homology Search.Shingo Masuno, Tsutomu Maruyama, Yoshiki Yamaguchi, Akihiko Konagaya
2005FPGA Implementation of an Area-Time Efficient FIR Filter Core Using a Self-Clocked Approach.J. Javier Martnez, F. Javier Toledo, F. Javier Garrigs, Jos Manuel Ferrndez de Vicente
2005Post-Placement BDD-Based Decomposition for FPGAs.Valavan Manohararajah, Deshanand P. Singh, Stephen Dean Brown
2005A Configuration Memory Architecture for Fast Run-Time-Reconfiguration of FPGAs.Usama Malik, Oliver Diessel
2005An Autonomous FPGA-based Emulation System for Fast Fault Tolerant Evaluation.Celia Lpez-Ongil, Mario Garca-Valderas, Marta Portela-Garca, Luis Entrena-Arrontes
2005FPGA PLB Evaluation using Quantified Boolean Satisfiability.Andrew C. Ling, Deshanand P. Singh, Stephen Dean Brown
2005Design and Test Methodology for a Reconfigurable PEM Data Acquisition Electronics System.Carlos Leong, P. Bento, Pedro Miguel Rodrigues, Andreia Trindade, Jos C. Silva, Pedro Lous, Joel Rego, J. Nobre, Joo Varela, Joo Paulo Teixeira, Isabel C. Teixeira
2005A Parallel MPEG-4 Encoder for FPGA Based Multiprocessor SoC.Olli Lehtoranta, Erno Salminen, Ari Kulmala, Marko Hnnikinen, Timo D. Hmlinen
2005Instruction Set Extension Using Microblaze Processor.Jnos Laznyi
2005Address Generation for FPGA RAMs for Efficient Implementation of Real-Time Video Processing Systems.Najeem Lawal, Benny Thrnberg, Mattias O'Nils
2005Low-Cost Fully Reconfigurable Data-Path for FPGA-Based Multimedia Processor.Marco Lanuzza, Stefania Perri, Martin Margala, Pasquale Corsonello
2005Evaluation Strategies for Coarse Grained Reconfigurable Architectures.Hendrik Lange, Hartmut Schrder
2005Energy Management in Battery-Powered Sensor Networks with Reconfigurable Computing Nodes.Jawad Khan, Ranga Vemuri
2005FPGA Implementation of a GF(2Maurice Keller, Tim Kerins, William P. Marnane
2005HAIL: A Hardware-Accelerated Algorithm for Language Identification.Charles M. Kastner, G. Adam Covington, Andrew A. Levine, John W. Lockwood
2005Configuration Merging for Adaptive Computer Applications.Nico Kasprzyk, Jan van der Veen, Andreas Koch
2005Fault-Tolerant XGFT Network-On-Chip for Multi-Processor System-on-Chip Circuits.Heikki Kariniemi, Jari Nurmi
2005An FPGA Solver for WSAT Algorithms.Kenji Kanazawa, Tsutomu Maruyama
2005Context Saving and Restoring for Multitasking in Reconfigurable Systems.Heiko Kalte, Mario Porrmann
2005Requested-QoS Driven Runtime Reconfiguration of Mobile Devices.Hiren Joshi, S. S. Verma, G. K. Sharma
2005A Novel Asynchronous FPGA Architecture Design and Its Performance Evaluation.Xin Jia, Ranga Vemuri
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