| 2004 | On the Design of Long-Life Reliable Systems for Ground-Based Applications. | Jose Miguel Vieira dos Santos |
| 2004 | Impact of ECCs on Simultaneously Switching Output Noise for On-Chip Busses of High Reliability Systems. | Daniele Rossi, A. Muccio, Andr K. Nieuwland, Atul Katoch, Cecilia Metra |
| 2004 | A New Dynamic Circuit Design Technique for High Performance TSC Checker Implementations. | A. Rao, Th. Haniotakis, Y. Tsiatouhas, V. Kaky |
| 2004 | Experimental Evaluation of Master/Checker Architecture Using Power Supply- and Software-Based Fault Injection. | Amir Rajabzadeh, Seyed Ghassem Miremadi, Mirzad Mohandespour |
| 2004 | Operating System Function Reuse to Achieve Low-Cost Fault Tolerance. | Michele Portolan, Rgis Leveugle |
| 2004 | On-line Monitoring Capabilities of Oscillation Test Techniques: Results Demonstration in an OTA. | Rodrigo Picos, Miquel Roca, Eugeni Isern, Sebasti A. Bota, Eugenio Garca |
| 2004 | A Matlab Based On-Chip Signal Generation and Analysis Environment for Mixed Signal Circuits. | Thomas O'Shea, Ian Andrew Grout |
| 2004 | Self-Checking Code-Disjoint Carry-Select Adder with Low Area Overhead by Use of Add1-Circuits. | Vitalij Ocheretnij, Daniel Marienfeld, Egor S. Sogomonyan, Michael Gssel |
| 2004 | Automated Logic SER Analysis and On-Line SER reduction. | Andr K. Nieuwland, Patrick Gindner |
| 2004 | Performance Evaluation and Failure Rate Prediction for the Soft Implemented Error Detection Technique. | Bogdan Nicolescu, Yvon Savaria, Raoul Velazco |
| 2004 | Low Cost On-Line Testing of RF Circuits. | Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin |
| 2004 | Designing a High Speed Decoder for Cyclic Codes. | Amine M'sir, Fabrice Monteiro, Abbas Dandache, Bernard Lepley |
| 2004 | Asynchronous Circuits Sensitivity to Fault Injection. | Yannick Monnet, Marc Renaudin, Rgis Leveugle |
| 2004 | Hardware Reconfiguration Scheme for High Availability Systems. | Cecilia Metra, A. Ferrari, Martin Omaa, Andrea Pagni |
| 2004 | An Intrinsically Robust Technique for Fault Tolerance under Multiple Upsets. | Carlos Arthur Lang Lisba, Luigi Carro |
| 2004 | A Hierarchical Self Test Scheme for SoCs. | Claudia Kretzschmar, Christian Galke, Heinrich Theodor Vierhaus |
| 2004 | Concurrent Error Detection in Sequential Circuits Implemented Using FPGAs with Embedded Memory Blocks. | Andrzej Krasniewski |
| 2004 | Accumulator based Test-per-Scan BIST. | P. Karpodinis, Dimitri Kagaris, Dimitris Nikolos |
| 2004 | A Comparative Study of the Design of Synchronous and Asynchronous Self-Checking RISC Processors. | Peter D. Hyde, G. Russell |
| 2004 | Scan Design and Secure Chip. | David Hly, Marie-Lise Flottes, Frdric Bancel, Bruno Rouzeyre, Nicolas Brard, Michel Renovell |
| 2004 | BIST of Delay Faults in the Logic Architecture of Symmetrical FPGAs. | Patrick Girard, Olivier Hron, Serge Pravossoudovitch, Michel Renovell |
| 2004 | A Technique to Reduce Power and Test Application Time in BIST. | Debjyoti Ghosh, Swarup Bhunia, Kaushik Roy |
| 2004 | Scrubbing Away Transients and Jiggling Around the Permanent: Long Survival of FPGA Systems Through Evolutionary Self-Repair. | Miguel Garvie, Adrian Thompson |
| 2004 | Transient Fault Emulation of Hardened Circuits in FPGA Platforms. | Mario Garca-Valderas, Celia Lpez-Ongil, Marta Portela-Garca, Luis Entrena |
| 2004 | Survey of the Algorithms in the Column-Matching BIST Method. | Petr Fiser, Hana Kubtov |