| 2003 | Exclusive Test and its Applications to Fault Diagnosis. | Vishwani D. Agrawal, Dong Hyun Baik, Yong Chang Kim, Kewal K. Saluja |
| 2003 | A Novel RF Front-End Chipset For ISM Band Wireless Applications. | Prashant Admane, Manoj Patasani, Biju Viswanathan |
| 2003 | Timing Minimization by Statistical Timing hMetis-based Partitioning. | Cristinel Ababei, Kia Bazargan |
| 2002 | Power Supply Noise Aware Floorplanning and Decoupling Capacitance Placement. | Shiyou Zhao, Kaushik Roy, Cheng-Kok Koh |
| 2002 | An Efficient 3-Bit -Scan Multiplier without Overlapping Bits, and Its 64x64 Bit Implementation. | Hak-soo Yu, Jacob A. Abraham |
| 2002 | A Unified Method to Handle Different Kinds of Placement Constraints in Floorplan Design. | Evangeline F. Y. Young, Chris C. N. Chu, M. L. Ho |
| 2002 | Logic Synthesis for AND-XOR-OR Type Sense-Amplifying PLA. | Hiroaki Yoshida, Hiroaki Yamaoka, Makoto Ikeda, Kunihiro Asada |
| 2002 | Simultaneous Circuit Transformation and Routing. | Hiroaki Yoshida, Motohiro Sera, Masao Kubo, Masahiro Fujita |
| 2002 | IEEE 1394a_2000 Physical Layer ASIC. | Ranjit Yashwante, Bhalchandra Jahagirdar |
| 2002 | LSI Design in the 21st Century: Key Changes in Sub-1V Giga-Integration Era. | Kazuo Yano |
| 2002 | Efficient Macromodeling for On-Chip Interconnects. | Qinwei Xu, Pinaki Mazumder |
| 2002 | Rational ABCD Modeling of High-Speed Interconnects. | Qinwei Xu, Pinaki Mazumder |
| 2002 | An Efficient Hierarchical Timing-Driven Steiner Tree Algorithm for Global Routing. | Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu |
| 2002 | System-Level Design of Embedded Media Systems (Tutorial Abstract). | Pieter van der Wolf, W. M. Kruijtzer, Jos T. J. van Eijndhoven |
| 2002 | Minimizing Energy Consumption for High-Performance Processing. | Eric F. Weglarz, Kewal K. Saluja, Mikko H. Lipasti |
| 2002 | Input Space Adaptive Embedded Software Synthesis. | Weidong Wang, Anand Raghunathan, Ganesh Lakshminarayana, Niraj K. Jha |
| 2002 | An Adaptive Interconnect-Length Driven Placer. | Chi-Ming Tsai, Kun-Tien Kuo, Chyi-Hui Hong, Rung-Bin Lin |
| 2002 | Optimization of Test Accesses with a Combined BIST and External Test Scheme. | Makoto Sugihara, Hiroto Yasuura |
| 2002 | A Design of Analog C-Matrix Circuits Used for Signal/Data Processing. | Takayuki Sugawara, Yoshikazu Miyanaga, Norinobu Yoshida |
| 2002 | Efficient Approximate Balanced Truncation of General Large-Scale RLC Systems via Krylov Methods. | Q. Su, Venkataramanan Balakrishnan, Cheng-Kok Koh |
| 2002 | Implant Dose Sensitivity of 0.1m CMOS Inverter Delay. | H. C. Srinivasaiah, Navakanta Bhat |
| 2002 | Transistor Flaring in Deep Submicron-Design Considerations. | Vipul Singhal, C. B. Keshav, K. G. Surnanth, P. R. Suresh |
| 2002 | Architecture and Design of a High Performance SRAM for SOC Design. | Shobha Singh, Shamsi Azmi, Nutan Aarawal, Penaka Phani, Ansuman Rout |
| 2002 | An Efficient Algorithm for Low Power Pass Transistor Logic Synthesis. | Rupesh S. Shelar, Sachin S. Sapatnekar |
| 2002 | Path Delay Fault Test Generation for Standard Scan Designs Using State Tuples. | Yun Shao, Irith Pomeranz, Sudhakar M. Reddy |