| 1993 | The effect of defect clustering on test transparency and defect levels. | Adit D. Singh, C. Mani Krishna |
| 1993 | On parallel switch level fault simulation. | Christopher A. Ryan, Joseph G. Tront |
| 1993 | Design SRAMs for burn-in. | William R. Reohr, Yuen H. Chan, Donald W. Plass, Antonio Pelella, Philip T. Wu |
| 1993 | Aliasing computation using fault simulation with fault dropping. | Irith Pomeranz, Sudhakar M. Reddy |
| 1993 | ECC design of a custom DRAM storage unit. | Jean-Luc Peter |
| 1993 | Finitely self-checking circuits and their application on current sensors. | Michael Nicolaidis |
| 1993 | Computer-aided failure analysis of VLSI circuits using I | Samir B. Naik, Wojciech P. Maly |
| 1993 | Evaluation of test generation algorithms. | Yinghua Min, Zhongcheng Li |
| 1993 | Classification of bridging faults in CMOS circuits: experimental results and implications for test. | Scott F. Midkiff, S. Wayne Bollinger |
| 1993 | Testable design for BiCMOS stuck-open fault detection. | Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya |
| 1993 | Worst-case analysis for pseudorandom testing. | Radu Marculescu |
| 1993 | Hard faults diagnosis in analog circuits using sensitivity analysis. | Yunsheng Lu, Ramaswami Dandapani |
| 1993 | Error detection, fault location and reconfiguration for 2D mesh processing element arrays for digital signal processing. | Guoning Liao |
| 1993 | Testability analysis based on structural and behavioral information. | Jaushin Lee, Janak H. Patel |
| 1993 | Impact of high level functional constraints on testability. | Jaushin Lee, Vivek Chickermane, Janak H. Patel |
| 1993 | Defect-tolerant cache memory design. | Dan Lamet, James F. Frenzel |
| 1993 | Testability preserving Boolean transforms for logic synthesis. | Sandip Kundu, Ankan K. Pramanick |
| 1993 | On diagnosis of faults in a scan-chain. | Sandip Kundu |
| 1993 | Explorations of sequential ATPG using Boolean satisfiability. | Haluk Konuk, Tracy Larrabee |
| 1993 | Signal probability calculations using partial functional manipulation. | Ravishankar Kodavarti, Don E. Ross |
| 1993 | Parallelization methods for circuit partitioning based parallel automatic test pattern generation. | Robert H. Klenke, Ronald D. Williams, James H. Aylor |
| 1993 | CCSTG: an efficient test pattern generator for sequential circuits. | Kyuchull Kim, Kewal K. Saluja |
| 1993 | Automatic synthesis of DUT board circuits for testing of mixed signal ICs. | William H. Kao, Jean Qincui Xia |
| 1993 | Carafe: an inductive fault analysis tool for CMOS VLSI circuits. | Alvin Jee, F. Joel Ferguson |
| 1993 | Controllability and observability measures for functional-level testability evaluation. | Mohamed Jamoussi, Bozena Kaminska |