| 1992 | Data driven neural-based measurement discrimination for IC parametric faults diagnosis. | Angus Wu, Jack L. Meador |
| 1992 | Accelerated path delay fault simulation. | Yuejian Wu, Andr Ivanov |
| 1992 | BIST linear generator based on complemented outputs. | Lew Fock Chong Lew Yan Voon, Christian Dufaza, Christian Landrault |
| 1992 | On test generation for path delay faults in ASICs. | Prab Varma |
| 1992 | Built-in current self-testing scheme (BICST) for CMOS logic circuits. | Qiao Tong |
| 1992 | On test generation for combinational circuits consisting of AND and EXOR gates. | Shunichi Toida, Nageswara S. V. Rao |
| 1992 | A testable static RAM structure for efficient coverage of pattern sensitive faults. | Shyang-Tai Su, Rafic Z. Makki |
| 1992 | Self-testing and self-checking combinational circuits with weakly independent outputs. | Egor S. Sogomonyan, Michael Gssel |
| 1992 | A new tool for random testability evaluation using simulation and formal proof. | Emmanuel Simeu, Anura Puissochet, Jean-Luc Rainard, Anne-Marie Tagant, Michel Poize |
| 1992 | Detection of multiple faults in CMOS circuits using a behavioral approach. | Yi-Nan Shen, Fabrizio Lombardi |
| 1992 | On-chip current sensing circuit for CMOS VLSI. | Tung-Li Shen, James C. Daly, Jien-Chung Lo |
| 1992 | Partner SRLs for improved shift register diagnostics. | James L. Schafer, Fred A. Policastri, Richard J. McNulty |
| 1992 | Developments in delay testing. | Jacob Savir |
| 1992 | Testing and design for testability of BiCMOS logic circuits. | Aly Ezzat Salama, Mohamed I. Elmasry |
| 1992 | Probe point insertion for at-speed test. | Elizabeth M. Rudnick, Vivek Chickermane, Janak H. Patel |
| 1992 | Delay fault testing of iterative arithmetic arrays. | Rabindra K. Roy, Naveena Nagi, Abhijit Chatterjee, Manuel A. d'Abreu |
| 1992 | Zero cost testing of check bits in RAMs with on-chip ECC. | Parameswaran Ramanathan, Kewal K. Saluja, Michael J. Franklin |
| 1992 | Recent advances in logic synthesis with testability. | Janusz Rajski, Jagadeesh Vasudevamurthy, Aiman El-Maleh |
| 1992 | A design for testability scheme to reduce test application time in full scan. | Dhiraj K. Pradhan, Jayashree Saxena |
| 1992 | Generalization of independent faults for transition faults. | Irith Pomeranz, Sudhakar M. Reddy |
| 1992 | Design of reduced testing for VLSI circuits based on linear code theory. | Tales Cleber Pimenta, M. Ebrahim Mokari |
| 1992 | Built-in self-test design for large embedded PLAs. | Alicja Pierzynska, Slawomir Pilarski |
| 1992 | Improving the theory of truth table verification of iterative logic arrays. | Michael Nicolaidis |
| 1992 | Coset error detection in BIST design. | Prawat Nagvajara, Mark G. Karpovsky |
| 1992 | Hierarchical fault modeling for analog and mixed-signal circuits. | Naveena Nagi, Jacob A. Abraham |