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Jrgen Becker

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

146

Venues

34

Active years

1994–2026

Best venue rank

A*

Where they publish

Papers

146 indexed papers, newest first.

YearVenueTitleAuthors
2026DATEMulti-Partner Project: CeCaS Accelerator Design for Efficient Supercomputing in Automotive Systems.Annina Gutermann, Alexey Serdyuk, Fabian Lesniak, Julian Hfer, Hella Toto-Kiesa, Tanja Harbaum, Jrgen Becker, Brian Pachideh, Sven Nitzsche, Moritz Neher, Carmen Weigelt, Jann Krausse, Victor Pazmino Betancourt, Klaus Knobloch, Lukas Groth, Andrija Neskovic, Saleh Mulhem, Mladen Berekovic
2026DATEMulti-Partner Project: A Holistic and Open-Source Approach to Efficient, Secure and Reliable AI Hardware Deployment in DI-EDAI.Georgios Sotiropoulos, Felix Frombach, Julian Hfer, Tanja Harbaum, Jrgen Becker, Henrik Iver Thore, Vincent Meyers, Mehdi B. Tahoori, Zeynep Demirdag, Mohammed Bakr Sikal, Hassan Nassar, Heba Khdr, Jrg Henkel, Christopher Wolters, Philipp van Kempen, Johannes Geier, Ulf Schlichtmann, Batuhan Sesli, Muhammad Sabih, Jakob Wittmann, Frank Hannig, Jrgen Teich, Lukas Steiner, Norbert Wehn, Mohamed Shelkamy Ali, Philipp Schmitz, Wolfgang Kunz, Stefan Koegler, Georg Sigl
2026DATEMulti-Partner Project: Scheduling-Deployment Workflow for Autonomous RoboRacer Driving Stacks in the HAL4SDV Project.Matthias Stammler, Henrik Scheidt, Tanja Harbaum, Jrgen Becker, Konstantin Dudzik, Victor Pazmino Betancourt, Federico Gavioli, Paolo Burgio, Arvind Easwaran, Andreas Eckel
2026FCCMReconfigurable Computing Challenge: Real-Time Graph Neural Networks for Online Event Selection in Big Science.Marc Neu, Frank Baptist, Thomas Lobmaier, Fabio Papagno, Torben Ferber, Jrgen Becker
2025DATEMulti-Partner Project: Open-Source Design Tools for Co-Development of AI Algorithms and AI Chips: (Initial Stage).Mehdi B. Tahoori, Jrgen Becker, Jrg Henkel, Wolfgang Kunz, Ulf Schlichtmann, Georg Sigl, Jrgen Teich, Norbert Wehn
2025DSDDSEParted: Co-Optimization of Embedded NPU Architectures and Neural Network Partitioning.Patrick Schmidt, Fabian Kre, Alexey Serdyuk, Matthias Stammler, Tanja Harbaum, Jrgen Becker
2025ICANNEvolving Spatially Embedded Recurrent Spiking Neural Networks for Control Tasks.Alexandru Vasilache, Jona Scholz, Yulia Sandamirskaya, Jrgen Becker
2024DATEXANDAR: An X-by-Construction Framework for Safety, Security, and Real-Time Behavior of Embedded Software Systems.Tobias Drr, Florian Schade, Jrgen Becker, Georgios Keramidas, Nikos Petrellis, Vasilios I. Kelefouras, Michail Mavropoulos, Konstantinos Antonopoulos, Christos P. Antonopoulos, Nikolaos S. Voros, Alexander Ahlbrecht, Wanja Zaeske, Vincent Janson, Phillip Nldeke, Umut Durak, Christos Panagiotou, Dimitris Karadimas, Nico Adler, Clemens Reichmann, Andreas Sailer, Raphael Weber, Thomas Wilhelm, Wolfgang Gabler, Katrin Weiden, Xavier Anzuela Recasens, Sakir Sezer, Fahad Siddiqui, Rafiullah Khan, Kieran McLaughlin, Sena Yengec Tasdemir, Balmukund Sonigara, Henry Hui, Esther Soriano Viguer, Aridane lvarez Surez, Vicente Nicolau Gallego, Manuel Muoz Alcobendas, Miguel Masmano Tello
2024DATEEMDRIVE Architecture: Embedded Distributed Computing and Diagnostics from Sensor to Edge.Patrick Schmidt, Iuliia Topko, Matthias Stammler, Tanja Harbaum, Jrgen Becker, Rico Berner, Omar Ahmed, Jakub Jagielski, Thomas Seidler, Markus Abel, Marius Kreutzer, Maximilian Kirschner, Victor Pazmino Betancourt, Robin Sehm, Lukas Groth, Andrija Neskovic, Rolf Meyer, Saleh Mulhem, Mladen Berekovic, Matthias Probst, Manuel Brosch, Georg Sigl, Thomas Wild, Matthias Ernst, Andreas Herkersdorf, Florian Aigner, Stefan Hommes, Sebastian Lauer, Maximilian Seidler, Thomas Raste, Gasper Skvarc Bozic, Ibai Irigoyen Ceberio, Muhammad Hassan, Albrecht Mayer
2024DATEUNCOVER: Data-Driven Design Support through Continuous Monitoring of Security Incidents.Matthias Stammler, Julian Lorenz, Eric Sax, Jrgen Becker, Matthias Hamann, Patrick Bidinger, Andreas Dewald, Paraskevi Georgouti, Alexios Camarinopoulos, Gnter Becker, Klaus Finsterbusch, Maximilian Kirschner, Laurenz Adolph, Carl Philipp Hohl, Maria Rill, Daniel Vonderau, Victor Pazmino Betancourt
2024DSDAutomated Polyhedron-based TDMA Schedule Design for Predictable Mixed-Criticality MPSoCs.Matthias Stammler, Florian Schade, Jrgen Becker
2024FCCMPh.D. Project: Compiler-Driven Hardware/Software Co- Design for Embedded AI.Patrick Schmidt, Jrgen Becker
2024ICFECMigration of Isolated Application Across Heterogeneous Edge Systems.Marius Kreutzer, Maximilian Seidler, Konstantin Dudzik, Victor Pazmino Betancourt, Jrgen Becker
2024ISCASA Challenge-Based Blended Learning Approach for an Introductory Digital Circuits and Systems Course.Julian Hfer, Michael Gau, Manuela Adams, Fabian Kre, Fabian Kempf, Christian Maximilian Karle, Tanja Harbaum, Andreas Barth, Jrgen Becker
2024RTSSWork-in-Progress: Real-Time Neural Network Inference on a Custom RISC-V Multicore Vector Processor.Maximilian Kirschner, Konstantin Dudzik, Jrgen Becker
2024RTASWork in Progress: Predictable Execution of Isolated Real-Time Tasks on Multicore Systems Using the LET Paradigm.Konstantin Dudzik, Maximilian Kirschner, Victor Pazmino Betancourt, Jrgen Becker
2023DASCCharacterization of Execution Time Variability in FPGA-Based AI-Accelerators.Maximilian Kirschner, Federico Nicols Peccia, Felix Thmmes, Victor Pazmino Betancourt, Oliver Bringmann, Jrgen Becker
2023DATEThe ZuSE-KI-Mobil AI Accelerator SoC: Overview and a Functional Safety Perspective.Fabian Kempf, Julian Hfer, Tanja Harbaum, Jrgen Becker, Nael Fasfous, Alexander Frickenstein, Hans-Jrg Vgel, Simon Friedrich, Robert Wittig, Emil Mats, Gerhard P. Fettweis, Matthias Lders, Holger Blume, Jens Benndorf, Darius Grantz, Martin Zeller, Dietmar Engelke, Karl-Heinz Eickel
2023DCOSSA Scalable and Cost-Efficient Antenna Testbed Using FPGA-Server Compound Structures for Prototyping 6G Applications.Marc Neu, Christian Maximilian Karle, Benjamin Nuss, Patrick Grschel, Jrgen Becker
2023DSDATLAS: An Approximate Time-Series LSTM Accelerator for Low-Power IoT Applications.Fabian Kre, Alexey Serdyuk, Micha Hiegle, Disnebio Waldmann, Tim Hotfilter, Julian Hfer, Tim Hamann, Jens Barth, Peter Kmpf, Tanja Harbaum, Jrgen Becker
2023DSDAutomatic Deployment of Embedded Real-Time Software Systems to Hypervisor-Managed Platforms.Florian Schade, Tobias Drr, Alexander Ahlbrecht, Vincent Janson, Umut Durak, Jrgen Becker
2023DSDMitigating Masking in Automotive Communication Systems: Modeling and Hardware Generation.Matthias Stammler, Matthias Hamann, Tanja Harbaum, Jrgen Becker
2023EMSOFTWork-in-Progress: Integrating WebAssembly into Service-Oriented Architectures for Edge Systems.Marius Kreutzer, Maximilian Seidler, Victor Pazmino Betancourt, Jrgen Becker
2023FCCMReLoDAQ: Resource-Efficient, Low-Overhead 200 GbitsChristian Maximilian Karle, Marc Neu, Johannes Pfau, Jan Sperling, Jrgen Becker
2023IROSDesign Space Exploration on Efficient and Accurate Human Pose Estimation from Sparse IMU-Sensing.Iris Frst-Walter, Antonio Nappi, Tanja Harbaum, Jrgen Becker
2023ISADSPolicy-Based Task Allocation at Runtime for a Self-Adaptive Edge Computing Infrastructure.Victor Pazmino Betancourt, Maximilian Kirschner, Marius Kreutzer, Jrgen Becker
2023ISCASA Unified SoC Lab Course: Combined Teaching of Mixed Signal Aspects, System Integration, Software Development and Documentation.Johannes Pfau, Richard Leys, Marc Neu, Alexey Serdyuk, Ivan Peric, Jrgen Becker
2023ICVSA Hardware-Aware Sampling Parameter Search for Efficient Probabilistic Object Detection.Julian Hfer, Tim Hotfilter, Fabian Kre, Chen Qiu, Tanja Harbaum, Jrgen Becker
2023SAFECOMPPattern-Based Information Flow Control for Safety-Critical On-Chip Systems.Tobias Drr, Florian Schade, Jrgen Becker
2022DATEAnaCoNGA: Analytical HW-CNN Co-Design Using Nested Genetic Algorithms.Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Emanuele Valpreda, Driton Salihu, Julian Hfer, Anmol Singh, Naveen Shankar Nagaraja, Hans-Jrg Vgel, Nguyen Anh Vu Doan, Maurizio Martina, Jrgen Becker, Walter Stechele
2022DATETowards Reconfigurable Accelerators in HPC: Designing a Multipurpose eFPGA Tile for Heterogeneous SoCs.Tim Hotfilter, Fabian Kre, Fabian Kempf, Jrgen Becker, Juan Miguel De Haro Ruiz, Daniel Jimnez-Gonzlez, Miquel Moret, Carlos lvarez, Jess Labarta, Imen Baili
2022DATEXANDAR: Exploiting the X-by-Construction Paradigm in Model-based Development of Safety-critical Systems.Leonard Masing, Tobias Drr, Florian Schade, Jrgen Becker, Georgios Keramidas, Christos P. Antonopoulos, Michail Mavropoulos, Efstratios Tiganourias, Vasilios I. Kelefouras, Konstantinos Antonopoulos, Nikolaos S. Voros, Umut Durak, Alexander Ahlbrecht, Wanja Zaeske, Christos Panagiotou, Dimitris Karadimas, Nico Adler, Andreas Sailer, Raphael Weber, Thomas Wilhelm, Gza Nmeth, Fahad Siddiqui, Rafiullah Khan, Vahid Garousi, Sakir Sezer, Victor Morales
2022DCOSSHardware-aware Partitioning of Convolutional Neural Network Inference for Embedded AI Applications.Fabian Kre, Julian Hfer, Tim Hotfilter, Iris Walter, Vladimir Sidorenko, Tanja Harbaum, Jrgen Becker
2022DSDAdaptive Exploration Based Routing for Spatial Isolation in Mixed Criticality Systems.Nidhi Anantharajaiah, Jrgen Becker
2022DSDA holistic hardware-software approach for fault-aware embedded systems.Fabian Kempf, Christoph Khbacher, Christian Mellwig, Sebastian Altmeyer, Theo Ungerer, Jrgen Becker
2022DSDHardware Support for Predictable Resource Sharing in Virtualized Heterogeneous Multicores.Timo Sandmann, Jrgen Becker
2022ICISSPPREUNN: Protocol Reverse Engineering using Neural Networks.Valentin Kiechle, Matthias Brsig, Sven Nitzsche, Ingmar Baumgart, Jrgen Becker
2022VTCXANDAR: A holistic Cybersecurity Engineering Process for Safety-critical and Cyber-physical Systems.Fahad Siddiqui, Rafiullah Khan, Sakir Sezer, Kieran McLaughlin, Leonard Masing, Tobias Drr, Florian Schade, Jrgen Becker, Alexander Ahlbrecht, Wanja Zaeske, Umut Durak, Nico Adler, Andreas Sailer, Raphael Weber, Thomas Wilhelm, Gza Nmeth, Victor Morales, Paco Gomez, Georgios Keramidas, Christos P. Antonopoulos, Michail Mavropoulos, Vasilios I. Kelefouras, Konstantinos Antonopoulos, Nikolaos S. Voros, Christos Panagiotou, Dimitris Karadimas
2022RTCSAUsing Trace Data for Run-Time Optimization of Parallel Execution in Real-Time Multi-Core Systems.Florian Schade, Timo Sandmann, Jrgen Becker, Henrik Theiling
2021DSDEmploying the Concept of Multilevel Security to Generate Access Protection Configurations for Automotive On-Board Networks.Tobias Drr, Timo Sandmann, Hannes Mohr, Jrgen Becker
2021FPLXANDAR: X-by-Construction Design framework for Engineering Autonomous & Distributed Real-time Embedded Software Systems.Jrgen Becker, Leonard Masing, Tobias Drr, Florian Schade, Georgios Keramidas, Christos P. Antonopoulos, Michail Mavropoulos, Efstratios Tiganourias, Vasilios I. Kelefouras, Konstantinos Antonopoulos, Nikolaos S. Voros, Umut Durak, Alexander Ahlbrecht, Wanja Zaeske, Christos Panagiotou, Dimitris Karadimas, Nico Adler, Andreas Sailer, Raphael Weber, Thomas Wilhelm, Florian Oszwald, Dominik Reinhardt, Mohamad Chamas, Adnan Bekan, Graham Smethurst, Fahad Siddiqui, Rafiullah Khan, Vahid Garousi, Sakir Sezer, Victor Morales
2021GINeuromorphic Vision mit Spiking Neural Networks zur Sturzerkennung im betreuten Wohnen.Sven Nitzsche, Brian Pachideh, Victor Pazmino Betancourt, Norbert Link, Christoph Schauer, Lukas Theurer, Valentin Haas, Philipp Marquardt, Sergey Biniaminov, Jrgen Becker
2021ICRABinary-LoRAX: Low-Latency Runtime Adaptable XNOR Classifier for Semi-Autonomous Grasping with Prosthetic Hands.Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Mohamed Badawy, Felix Hundhausen, Julian Hfer, Naveen Shankar Nagaraja, Christian Unger, Hans-Jrg Vgel, Jrgen Becker, Tamim Asfour, Walter Stechele
2021INDINTowards Policy-based Task Self-Reallocation in Dynamic Edge Computing Systems.Victor Pazmino Betancourt, Bo Liu, Jrgen Becker
2021RSPTemplate-Driven and Hardware-Centric Cross-Domain E/E Architecture Simulation.Kevin Neubauer, Leonard Masing, Michael Mahl, Jrgen Becker, Max E. Kramer, Clemens Reichmann
2020DATEWCET-aware Code Generation and Communication Optimization for Parallelizing Compilers.Simon Reder, Jrgen Becker
2020DSDA Formal Model for the Automatic Configuration of Access Protection Units in MPSoC-Based Embedded Systems.Tobias Drr, Timo Sandmann, Jrgen Becker
2020DSDAn Approach to Cost-Efficient Fault Tolerance in Inherently Redundant Fail-Operational Systems.Tobias Drr, Timo Sandmann, Patrick Friederich, Arnd Leitner, Jrgen Becker
2020RTASInterference-Aware Memory Allocation for Real-Time Multi-Core Systems.Simon Reder, Jrgen Becker
2019ICISSPA Secure Framework with Remote Configuration of Intellectual Property.Nadir Khan, Sven Nitzsche, Jrgen Becker
2019MICRODynamic and scalable runtime block-based multicast routing for networks on chips.Nidhi Anantharajaiah, Fabian Kempf, Leonard Masing, Fabian Marc Lesniak, Jrgen Becker
2018DATEA WCET-aware parallel programming model for predictability enhanced multi-core architectures.Simon Reder, Leonard Masing, Harald Bucher, Timon D. ter Braak, Timo Stripf, Jrgen Becker
2018ISPAHLS-Based Performance and Resource Optimization of Cryptographic Modules.Arthur Silitonga, Florian Schade, Guanru Jiang, Jrgen Becker
2017DATEWCET-aware parallelization of model-based applications for multi-cores: The ARGO approach.Steven Derrien, Isabelle Puaut, Panayiotis Alefragis, Marcus Bednara, Harald Bucher, Clment David, Yann Debray, Umut Durak, Imen Fassi, Christian Ferdinand, Damien Hardy, Angeliki Kritikakou, Gerard K. Rauwerda, Simon Reder, Martin Sicks, Timo Stripf, Kim Sunesen, Timon D. ter Braak, Nikolaos S. Voros, Jrgen Becker
2017FPGAEnergy Efficient Scientific Computing on FPGAs using OpenCL.Dennis Weller, Fabian Oboril, Dimitar Lukarski, Jrgen Becker, Mehdi Baradaran Tahoori
2016FCCMA Content Adapted FPGA Memory Architecture with Pattern Recognition Capability for L1 Track Triggering in the LHC Environment.Tanja Harbaum, Mahmoud Seboui, Matthias Norbert Balzer, Jrgen Becker, Marc Weber
2015FPLSoftware-in-the-Loop simulation of embedded control applications based on Virtual Platforms.Stephan Werner, Leonard Masing, Fabian Lesniak, Jrgen Becker
2014DACCAP: Communication Aware Programming.Jan Heisswolf, Aurang Zaib, Andreas Zwinkau, Sebastian Kobbe, Andreas Weichslgartner, Jrgen Teich, Jrg Henkel, Gregor Snelting, Andreas Herkersdorf, Jrgen Becker
2014DATEHardware virtualization support for shared resources in mixed-criticality multicore systems.Oliver Sander, Timo Sandmann, Viet Vu Duy, Steffen Bhr, Falco Bapp, Jrgen Becker, Hans-Ulrich Michel, Dirk Kaule, Daniel Adam, Enno Lbbers, Jrgen Hairbucher, Andre Oliver Richter, Christian Herber, Andreas Herkersdorf
2014DSDAdaptive Algorithm and Tool Flow for Accelerating System C on Many-Core Architectures.Christoph Roth, Simon Reder, Harald Bucher, Oliver Sander, Jrgen Becker
2014ISPAA Hierarchical Architecture Description for Flexible Multicore System Simulation.Thomas Bruckschlgl, Oliver Oey, Michael Rckauer, Timo Stripf, Jrgen Becker
2014PDPSmartLoCore: A Concept for an Adaptive Power-Aware Localization Processor.Carsten Tradowsky, Tobias Gdeke, Thomas Bruckschlgl, Wilhelm Stork, Klaus D. Mller-Glaser, Jrgen Becker
2013DATEHybrid interconnect design for heterogeneous hardware accelerators.Cuong Pham-Quoc, Jan Heisswolf, Stephan Werner, Zaid Al-Ars, Jrgen Becker, Koen Bertels
2013DSDCoarse-Grain Optimization and Code Generation for Embedded Multicore Systems.George Goulas, Christos Valouxis, Panayiotis Alefragis, Nikolaos S. Voros, Christos Gogos, Oliver Oey, Timo Stripf, Thomas Bruckschlgl, Jrgen Becker, Ali El Moussawi, Maxime Naullet, Tomofumi Yuki
2013DSDConcurrent Error Detection in Multipliers by Using Reduced Wordlength Multiplication and Logarithms.Alexander Uhl, Jrgen Becker
2013DSDAUTO-GS: Self-Optimization of NoC Traffic through Hardware Managed Virtual Connections.Aurang Zaib, Jan Heisswolf, Andreas Weichslgartner, Thomas Wild, Jrgen Teich, Jrgen Becker, Andreas Herkersdorf
2013FPLA platform-independent runtime methodology for mapping multiple applications onto FPGAs through resource virtualization.Harry Sidiropoulos, Peter Figuli, Kostas Siozios, Dimitrios Soudris, Jrgen Becker
2013SACAn FPGA-based multi-core approach for pipelining computing stages.Ali Azarian, Joo M. P. Cardoso, Stephan Werner, Jrgen Becker
2012ASPDACHardware prototyping of novel invasive multicore architectures.Jrgen Becker, Stephanie Friederich, Jan Heisswolf, Ralf Knig, David May
2012DATEOn demand dependent deactivation of automotive ECUs.Christoph Schmutzler, Martin Simons, Jrgen Becker
2012DATEA cycle-approximate, mixed-ISA simulator for the KAHRISMA architecture.Timo Stripf, Ralf Knig, Jrgen Becker
2012DATEVirtualized on-chip distributed computing for heterogeneous reconfigurable multi-core systems.Stephan Werner, Oliver Oey, Diana Ghringer, Michael Hbner, Jrgen Becker
2012DSDFrom Scilab to High Performance Embedded Multicore Systems: The ALMA Approach.Jrgen Becker, Timo Stripf, Oliver Oey, Michael Hbner, Steven Derrien, Daniel Mnard, Olivier Sentieys, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Kostas Masselos, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Dimitrios Kritharidis, Nikolaos Mitas, Diana Ghringer
2012INDINFramework for dynamic verification of multi-domain virtual platforms in industrial automation.Francisco Mendoza, Joris Pascal, Philipp Nenninger, Jrgen Becker
2012ISPAA Scalable NoC Router Design Providing QoS Support Using Weighted Round Robin Scheduling.Jan Heisswolf, Ralf Knig, Jrgen Becker
2011DATEFast Start-up for Spartan-6 FPGAs using Dynamic Partial Reconfiguration.Joachim Meyer, Juanjo Noguera, Michael Hbner, Lars Braun, Oliver Sander, R. M. Gil, Rodney Stewart, Jrgen Becker
2011FCCMRun-Time Resource Allocation for Simultaneous Multi-tasking in Multi-core Reconfigurable Processors.Waheed Ahmed, Muhammad Shafique, Lars Bauer, Manuel Hammerich, Jrg Henkel, Jrgen Becker
2011FPLRAMPSoCVM: Runtime Support and Hardware Virtualization for a Runtime Adaptive MPSoC.Diana Ghringer, Stephan Werner, Michael Hbner, Jrgen Becker
2011FPLEmbedded Systems Start-Up under Timing Constraints on Modern FPGAs.Joachim Meyer, Juanjo Noguera, Michael Hbner, Rodney Stewart, Jrgen Becker
2011GIAnstze zur Integration von energieeffizienten Intelligenten Kommunikationskontrollern fr FlexRay in Autosar.Christoph Schmutzler, Andreas Krger, Martin Simons, Jrgen Becker
2011ISCASA FPGA based fast runtime reconfigurable real-time Multi-Object-Tracker.Matthias Rmmele-Werner, Thomas Perschke, Lars Braun, Michael Hbner, Jrgen Becker
2011ISORCDigital On-demand Computing Organism - Interaction between Monitoring and Middleware.Alexander von Renteln, Uwe Brinkschulte, David Kramer, Wolfgang Karl, Christian Schuck, Jrgen Becker
2011RSPAn automated approach to SystemC/Simulink co-simulation.Francisco Mendoza, Christian Kllner, Jrgen Becker, Klaus D. Mller-Glaser
2010DATEKAHRISMA: A novel Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array architecture.Ralf Knig, Lars Bauer, Timo Stripf, Muhammad Shafique, Waheed Ahmed, Jrgen Becker, Jrg Henkel
2010DATEScenario extraction for a refined timing-analysis of automotive network topologies.Matthias Traub, Thilo Streichert, Oleg Krasovytskyy, Jrgen Becker
2010FCCMA Design Methodology for Application Partitioning and Architecture Development of Reconfigurable Multiprocessor Systems-on-Chip.Diana Ghringer, Michael Hbner, Michael Benz, Jrgen Becker
2010FPGAA semi-automatic toolchain for reconfigurable multiprocessor systems-on-chip: architecture development and application partitioning (abstract only).Diana Ghringer, Michael Hbner, Michael Benz, Jrgen Becker
2010FPLReconfigurable Hardware for Power-over-Fiber Applications.Michael Dreschmann, Michael Hbner, Moritz Rger, Oliver Sander, Christos Klamouris, Jrgen Becker, Wolfgang Freude, Juerg Leuthold
2009DATEPriority-based packet communication on a bus-shaped structure for FPGA-systems.Oliver Sander, Benjamin Glas, Christoph Roth, Jrgen Becker, Klaus D. Mller-Glaser
2009FPLDynamic reconfigurable mixed-signal architecture for safety critical applications.Romuald Girardey, Michael Hbner, Jrgen Becker
2009FPLStar-Wheels Network-on-Chip featuring a self-adaptive mixed topology and a synergy of a circuit - and a packet-switching communication protocol.Diana Ghringer, Bin Liu, Michael Hbner, Jrgen Becker
2009VTCCar-to-Car Communication Security on Reconfigurable Hardware.Benjamin Glas, Oliver Sander, Vitali Stuckert, Klaus D. Mller-Glaser, Jrgen Becker
2009RSPConfiguration Measurement for FPGA-based Trusted Platforms.Benjamin Glas, Alexander Klimm, Klaus D. Mller-Glaser, Jrgen Becker
2009RSPTesting of an FPGA Based C2X-Communication Prototype with a Model Based Traffic Generation.Oliver Sander, Benjamin Glas, Christoph Roth, Jrgen Becker, Klaus D. Mller-Glaser
2008DATEDesign Flows, Communication Based Design and Architectures in Automotive Electronic Systems.Jrgen Becker, Michael Hbner, Robert Esser, Andreas Herkersdorf, Walter Stechele, Vera Lauer
2008DATEDesign of a HW/SW Communication Infrastructure for a Heterogeneous Reconfigurable Processor.Antonio Deledda, Claudio Mucci, Arseni Vitkovski, Philippe Bonnot, Arnaud Grasset, Philippe Millet, Matthias Khnle, Florian Ries, Michael Hbner, Jrgen Becker, Massimo Coppola, Lorenzo Pieralisi, Riccardo Locatelli, Giuseppe Maruccia, Fabio Campi, Tommaso DeMarco
2008DATEA System Architecture for Reconfigurable Trusted Platforms.Benjamin Glas, Alexander Klimm, Oliver Sander, Klaus D. Mller-Glaser, Jrgen Becker
2008DATEA Novel Recursive Algorithm for Bit-Efficient Realization of Arbitrary Length Inverse Modified Cosine Transforms.Ralf Knig, Timo Stripf, Jrgen Becker
2008DATECost-and Power Optimized FPGA based System Integration: Methodologies and Integration of a Low-Power Capacity-based Measurement Application on Xilinx FPGAs.Katarina Paulsson, Michael Hbner, Jrgen Becker
2008FCCMCombining Rewriting-Logic, Architecture Generation, and Simulation to Exploit Coarse-Grained Reconfigurable Architectures.Carlos Morra, Joo Bispo, Joo M. P. Cardoso, Jrgen Becker
2008FPLFine grain reconfigurable architectures.Josef Angermeier, Mateusz Majer, Jrgen Teich, Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hbner, Jrgen Becker, Enno Lbbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker
2008FPLData path driven waveform-like reconfiguration.Lars Braun, Katarina Paulsson, Herrmann Krmer, Michael Hbner, Jrgen Becker
2008FPLA multi-platform controller allowing for maximum Dynamic Partial Reconfiguration throughput.Christopher Claus, Bin Zhang, Walter Stechele, Lars Braun, Michael Hbner, Jrgen Becker
2008FPLCoarse-grained reconfiguration.Sven Eisenhardt, Thomas Schweizer, Julio A. de Oliveira Filho, Tobias Oppold, Wolfgang Rosenstiel, Alexander Thomas, Jrgen Becker, Frank Hannig, Dmitrij Kissler, Hritam Dutta, Jrgen Teich, Heiko Hinkelmann, Peter Zipf, Manfred Glesner
2008FPLNew dimensions for multiprocessor architectures: Ondemand heterogeneity, infrastructure and performance through reconfigurability - the RAMPSoC approach.Diana Ghringer, Michael Hbner, Thomas Perschke, Jrgen Becker
2008FPLExploitation of dynamic and partial hardware reconfiguration for on-line power/performance optimization.Katarina Paulsson, Michael Hbner, Jrgen Becker
2008RSPA Prototype of Trusted Platform Functionality on Reconfigurable Hardware for Bitstream Updates.Benjamin Glas, Alexander Klimm, David Schwab, Klaus D. Mller-Glaser, Jrgen Becker
2007FPLCircuit Switched Run-Time Adaptive Network-on-Chip for Image Processing Applications.Lars Braun, Michael Hbner, Jrgen Becker, Thomas Perschke, Volker Schatz, Stefan Bach
2007FPLH.264 Decoder at HD Resolution on a Coarse Grain Dynamically Reconfigurable Architecture.Mahendra Kumar Angamuthu Ganesan, Sundeep Singh, Frank May, Jrgen Becker
2007FPLA Graphical Model-Level Debugger for Heterogenous Reconfigurable Architectures.Philipp Graf, Michael Hbner, Klaus D. Mller-Glaser, Jrgen Becker
2007FPLImplementation of a Virtual Internal Configuration Access Port (JCAP) for Enabling Partial Self-Reconfiguration on Xilinx Spartan III FPGAs.Katarina Paulsson, Michael Hbner, Gnther Auer, Michael Dreschmann, Jrgen Becker
2007FPLOn-line Routing of Reconfigurable Functions for Future Self-Adaptive Systems - Investigations within the THER Project.Katarina Paulsson, Michael Hbner, Jrgen Becker, Jean-Marc Philippe, Christian Gamrat
2007FPLartNoC - A Novel Multi-Functional Router Architecture for Organic Computing.Christian Schuck, Stefan Lamparth, Jrgen Becker
2007FPLMORPHEUS: Heterogeneous Reconfigurable Computing.Florian Thoma, Matthias Khnle, Philippe Bonnot, Elena Moscu Panainte, Koen Bertels, Sebastian Goller, Axel Schneider, Stphane Guyetant, Eberhard Schler, Klaus D. Mller-Glaser, Jrgen Becker
2006FPLFrom Equation to VHDL: Using Rewriting Logic for Automated Function Generation.Carlos Morra, M. Sackmann, Sunil Shukla, Jrgen Becker, Reiner W. Hartenstein
2005FPLRun-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors.Pascal Benoit, Jrgen Becker, Michel Robert, Lionel Torres, Gilles Sassatelli, Gaston Cambon
2005FPLFELIX: Using Rewriting-Logic for Generating Functionally Equivalent Implementations.Carlos Morra, Jrgen Becker, Mauricio Ayala-Rincn, Reiner W. Hartenstein
2004DATEHardware Support for QoS-based Function Allocation in Reconfigurable Systems.Michael Ullmann, Wansheng Jin, Jrgen Becker
2004FPLScalable Application-Dependent Network on Chip Adaptivity for Dynamical Reconfigurable Real-Time Systems.Michael Hbner, Michael Ullmann, Lars Braun, A. Klausmann, Jrgen Becker
2004FPLDynamic Adaptive Runtime Routing Techniques in Multigrain Reconfigurable Hardware Architectures.Alexander Thomas, Jrgen Becker
2004FPLOn-Demand FPGA Run-Time System for Dynamical Reconfiguration with Adaptive Priorities.Michael Ullmann, Michael Hbner, Bjrn Grimm, Jrgen Becker
2004GICARUSO - Project Goals and Principal Approach.Uwe Brinkschulte, Jrgen Becker, Klaus Dorfmller-Ulhaas, Ralf Knig, Sascha Uhrig, Theo Ungerer
2003DATEAn Industrial/Academic Configurable System-on-Chip Project (CSoC): Coarse-Grain XXP-/Leon-Based Architecture Integration.Jrgen Becker, Alexander Thomas, Martin Vorbach, Volker Baumgarten
2002RSPRapid Prototyping of FPGA Based Floating Point DSP Systems.Chun Hok Ho, Monk-Ping Leong, Philip Heng Wai Leong, Jrgen Becker, Manfred Glesner
2001FPLEfficient Mapping of Pre-synthesized IP-Cores onto Dynamically Reconfigurable Array Architectures.Jrgen Becker, Nicolas Liebau, Thilo Pionteck, Manfred Glesner
2001RSPPrototyping of Efficient Hardware Algorithms for Data Compression in Future Communication Systems.Amar Mukherjee, Nitin Motgi, Jrgen Becker, A. Friebe, C. Habermann, Manfred Glesner
2000FCCMArchitecture and Application of a Dynamically Reconfigurable Hardware Array for Future Mobile Communication Systems.Ahmad Alsolaim, Janusz A. Starzyk, Jrgen Becker, Manfred Glesner
2000FPLDReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communications Applications.Jrgen Becker, Thilo Pionteck, Manfred Glesner
2000FPLField Programmable Communication Emulation and Optimization for Embedded System Design.Frank-Michael Renner, Jrgen Becker, Manfred Glesner
2000PDPTAIP-based Application Mapping Techniques for Dynamically Reconfigurable Hardware Architectures.Jrgen Becker, Manfred Glesner
2000PDPTAFast Communication Mechanisms in Coarse-grained Dynamically Reconfigurable Array Architectures.Jrgen Becker, Manfred Glesner, Ahmad Alsolaim, Janusz A. Starzyk
2000RSPSimulation and Rapid Prototyping of Flexible Systems-on-a-Chip for Future Mobile Communication Applications.Jrgen Becker, Lukusa D. Kabulepa, Frank-Michael Renner, Manfred Glesner
2000RSPAutomated Communication Synthesis for Architecture-Precise Rapid Prototyping of Real-Time Embedded Systems.Frank-Michael Renner, Jrgen Becker, Manfred Glesner
1999FPLDynamically Reconfigurable Reduced Crossbar: A Novel Approach to Large Scale Switching.Tri Caohuu, Thuy Trong Le, Manfred Glesner, Jrgen Becker
1999RSPCommunication Performance Models for Architecture-Precise Prototyping of Real-Time Embedded Systems.Frank-Michael Renner, Jrgen Becker, Manfred Glesner
1998ASPDACParallelization in Co-Compilation for Configurable Accelerators.Jrgen Becker, Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger
1998FPLPerspectives of Reconfigurable Computing in Research, Industry and Education.Jrgen Becker, Andreas Kirschbaum, Frank-Michael Renner, Manfred Glesner
1998FPLAn FPFA Implementation of a Magnetic Bearing Controller for Mechatronic Applications.Frank-Michael Renner, Jrgen Becker, Manfred Glesner
1998RSPReal-Time Prototyping in Microprocessor/Accelerator Symbiosis.Jrgen Becker, Reiner W. Hartenstein
1998RSPRun-Time Monitoring of Communication Activities in a Rapid Prototyping Environment.Andreas Kirschbaum, Jrgen Becker, Manfred Glesner
1997FPLData scheduling to increase performance of parallel accelerators.Reiner W. Hartenstein, Jrgen Becker, Michael Herz, Ulrich Nageldinger
1997VLSIDHardware/Software Co-Design for Data-Driven Xputer-based Accelerators.Reiner W. Hartenstein, Jrgen Becker
1996ECRTSAn Embedded Accelerator for Real-Time Image Processing.Reiner W. Hartenstein, Jrgen Becker, Rainer Kress
1996FPLCustom Computing Machines vs. Hardware/Software Codesign: From a globalized point of view.Reiner W. Hartenstein, Jrgen Becker, Rainer Kress
1996VLSIDCoDe-C: A Novel Two-Level Hardware/Software Co-Design Framework.Reiner W. Hartenstein, Jrgen Becker, Rainer Kress, Helmut Reinig
1994FPLData-Procedural Languages for FPL-based Machines.Andreas Ast, Jrgen Becker, Reiner W. Hartenstein, Rainer Kress, Helmut Reinig, Karin Schmidt