| 2013 | A memory-efficient hardware architecture for real-time feature detection of the SIFT algorithm (abstract only). | Wenjuan Deng, Yiqun Zhu |
| 2013 | Location, location, location: the role of spatial locality in asymptotic energy minimization. | Andr DeHon |
| 2013 | Hardware description and synthesis of control-intensive reconfigurable dataflow architectures (abstract only). | Marc-Andr Daigneault, Jean-Pierre David |
| 2013 | A high-performance, low-energy FPGA accelerator for correntropy-based feature tracking (abstract only). | Patrick Cooke, Jeremy Fowers, Lee Hunt, Greg Stitt |
| 2013 | Defect recovery in nanodevice-based programmable interconnects (abstract only). | Jason Cong, Bingjun Xiao |
| 2013 | Efficient system-level mapping from streaming applications to FPGAs (abstract only). | Jason Cong, Muhuan Huang, Peng Zhang |
| 2013 | Architecture support for custom instructions with memory operations. | Jason Cong, Karthik Gururaj |
| 2013 | Cross-platform FPGA accelerator development using CoRAM and CONNECT. | Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe |
| 2013 | Towards automatic customization of interconnect and memory in the CoRAM abstraction (abstract only). | Eric S. Chung, Michael Papamichael |
| 2013 | Video-rate stereo matching using markov random field TRW-S inference on a hybrid CPU+FPGA computing platform. | Jungwook Choi, Rob A. Rutenbar |
| 2013 | An FPGA-based transient error simulator for evaluating resilient system designs (abstract only). | Chia-Hsiang Chen, Shiming Song, Zhengya Zhang |
| 2013 | An FPGA memcached appliance. | Sai Rahul Chalamalasetti, Kevin T. Lim, Mitch Wright, Alvin AuYoung, Parthasarathy Ranganathan, Martin Margala |
| 2013 | A latency-optimized hybrid network for clustering FPGAs (abstract only). | Trevor Bunker, Steven Swanson |
| 2013 | Word-length optimization beyond straight line code. | David Boland, George A. Constantinides |
| 2013 | Are FPGAs suffering from the innovator's dilemna? | Vaughn Betz, Jason Cong |
| 2013 | A novel run-time auto-reconfigurable FPGA architecture for fast fault recovery with backward compatibility (abstract only). | Hasan Baig, Jeong-A Lee |
| 2013 | Exploiting algorithmic-level memory parallelism in distributed logic-memory architecture through hardware-assisted dynamic graph (abstract only). | Yu Bai, Abigail Fuentes-Rivera, Mingjie Lin, Mike Riera |
| 2013 | Circuit optimizations to minimize energy in the global interconnect of a low-power-FPGA (abstract only). | Oluseyi A. Ayorinde, Benton H. Calhoun |
| 2013 | High-level synthesis with LegUp: a crash course for users and researchers. | Jason Helge Anderson, Stephen Dean Brown, Andrew Canis, Jongsok Choi |
| 2013 | Acceleration of the long read mapping on a PC-FPGA architecture (abstract only). | Peng Chen, Chao Wang, Xi Li, Xuehai Zhou |
| 2012 | Securing netlist-level FPGA design through exploiting process variation and degradation. | Jason Xin Zheng, Miodrag Potkonjak |
| 2012 | Scalable architecture for 135 GBPS IPv6 lookup on FPGA (abstract only). | Yi-Hua E. Yang, Oguzhan Erdem, Viktor K. Prasanna |
| 2012 | A fast discrete placement algorithm for FPGAs. | Qinghong Wu, Kenneth S. McElvain |
| 2012 | The masala machine: accelerating thread-intensive and explicit memory management programs with dynamically reconfigurable FPGAs (abstract only). | Mei Wen, Nan Wu, Qianming Yang, Chunyuan Zhang, Liang Zhao |
| 2012 | Parallel FPGA placement based on individual LUT placement (abstract only). | Chris C. Wang, Guy G. F. Lemieux |