| 2002 | A dynamically reconfigurable adaptive viterbi decoder. | Sriram Swaminathan, Russell Tessier, Dennis Goeckel, Wayne P. Burleson |
| 2002 | Performance-constrained pipelining of software loops onto reconfigurable hardware. | Greg Snider |
| 2002 | Efficient circuit clustering for area and power reduction in FPGAs. | Amit Singh, Malgorzata Marek-Sadowska |
| 2002 | Constrained clock shifting for field programmable gate arrays. | Deshanand P. Singh, Stephen Dean Brown |
| 2002 | Integrated retiming and placement for field programmable gate arrays. | Deshanand P. Singh, Stephen Dean Brown |
| 2002 | Dynamic power consumption in Virtex[tm]-II FPGA family. | Li Shang, Alireza Kaviani, Kusuma Bathala |
| 2002 | FPGA implementation of neighborhood-of-four cellular automata random number generators. | Barry Shackleford, Motoo Tanaka, Richard J. Carter, Greg Snider |
| 2002 | Application of FPGA technology to accelerate the finite-difference time-domain (FDTD) method. | Ryan N. Schneider, Laurence E. Turner, Michal M. Okoniewski |
| 2002 | FPGA switch block layout and evaluation. | Herman Schmit, Vikas Chandra |
| 2002 | Timing verification of dynamically reconfigurable logic for the xilinx virtex FPGA series. | Ian Robertson, James Irvine, Patrick Lysaght, David Robinson |
| 2002 | Automatic layout of domain-specific reconfigurable subsystems for system-on-a-chip. | Shawn Phillips, Scott Hauck |
| 2002 | FPGA test time reduction through a novel interconnect testing scheme. | Stuart McCracken, Zeljko Zilic |
| 2002 | Analysis of quasi-static scheduling techniques in a virtualized reconfigurable machine. | Yury Markovsky, Eylon Caspi, Randy Huang, Joseph Yeh, Michael Chu, John Wawrzynek, Andr DeHon |
| 2002 | Configuration prefetching techniques for partial reconfigurable coprocessor with relocation and defragmentation. | Zhiyuan Li, Scott Hauck |
| 2002 | Circuit design of routing switches. | Guy G. Lemieux, David M. Lewis |
| 2002 | Incremental reconfiguration of multi-FPGA systems. | K. K. Lee, D. F. Wong |
| 2002 | Cryptographic rights management of FPGA intellectual property cores. | Tom Kean |
| 2002 | Interconnect enhancements for a high-speed PLD architecture. | Michael D. Hutton, Vinson Chan, Peter Kazarian, Victor Maruri, Tony Ngai, Jim Park, Rakesh H. Patel, Bruce Pedersen, Jay Schleicher, Sergey Y. Shumarayev |
| 2002 | A faster distributed arithmetic architecture for FPGAs. | Radhika S. Grover, Weijia Shang, Qiang Li |
| 2002 | Data reorganization engines for the next generation of system-on-a-chip FPGAs. | Pedro C. Diniz, Joonseok Park |
| 2002 | A flexible floating-point format for optimizing data-paths and operators in FPGA based DSPs. | J. Dido, N. Graudie, L. Loiseau, O. Payeur, Yvon Savaria, D. Poirier |
| 2002 | Efficient architectures for implementing montgomery modular multiplication and RSA modular exponentiation on reconfigurable logic. | Alan Daly, William P. Marnane |
| 2002 | Parallel-beam backprojection: an FPGA implementation optimized for medical imaging. | Srdjan Coric, Miriam Leeser, Eric L. Miller, Marc Trepanier |
| 2002 | SPFD-based global rewiring. | Jason Cong, Yizhou Lin, Wangning Long |
| 2002 | EVE: a CAD tool for manual placement and pipelining assistance of FPGA circuits. | William Chow, Jonathan Rose |