| 2009 | FPGA supercomputing platforms: A survey. | Mariette Awad |
| 2009 | In search of agile hardware. | Peter Athanas |
| 2009 | Binary Synthesis with multiple memory banks targeting array references. | Yosi Ben-Asher, Nadav Rotem |
| 2009 | Performance comparison of FPGA, GPU and CPU in image processing. | Shuichi Asano, Tsutomu Maruyama, Yoshiki Yamaguchi |
| 2009 | A multi-layered XML schema and design tool for reusing and integrating FPGA IP. | Adam Arnesen, Nathan Rollins, Michael J. Wirthlin |
| 2009 | General methodology for mapping iterative approximation algorithms to adaptive dynamically partially reconfigurable systems. | Josef Angermeier, Abdulazim Amouri, Jrgen Teich |
| 2009 | The educational processor Sweet-16. | Venelin Angelov, Volker Lindenstruth |
| 2009 | Improving logic density through synthesis-inspired architecture. | Jason Helge Anderson, Qiang Wang |
| 2009 | Coarse-grained dynamically reconfigurable architecture with flexible reliability. | Dawood Alnajiar, Younghun Ko, Takashi Imagawa, Hiroaki Konoura, Masayuki Hiromoto, Yukio Mitsuyama, Masanori Hashimoto, Hiroyuki Ochi, Takao Onoye |
| 2009 | Virtex-6 and Spartan-6, plus a look into the future. | Peter Alfke |
| 2009 | A reconfigurable architecture for the Phylogenetic Likelihood Function. | Nikolaos Alachiotis, Alexandros Stamatakis, Euripides Sotiriades, Apostolos Dollas |
| 2009 | Building heterogeneous reconfigurable systems using threads. | Jason Agron, David Andrews |
| 2009 | Towards a viable out-of-order soft core: Copy-Free, checkpointed register renaming. | Kaveh Aasaraai, Andreas Moshovos |
| 2008 | Area optimization of bit parallel finite field multipliers with fast carry logic on FPGAS. | Gang Zhou, Li Li, Harald Michalik |
| 2008 | A reconfigurable accelerator for quantum computations. | Michail Zampetakis, Vasilis Samoladas, Apostolos Dollas |
| 2008 | Evaluating dynamic partial reconfiguration in the integer pipeline of a FPGA-based opensource processor. | Izhar Zaidi, Atukem Nabina, Cedric Nishan Canagarajah, Jos L. Nez-Yez |
| 2008 | FPGA interconnect design using logical effort. | Haile Yu, Yuk Hei Chan, Philip Heng Wai Leong |
| 2008 | FPGA interconnect sizing using extended logical effort model. | Haile Yu |
| 2008 | Practical implementation of a network-based stochastic biochemical simulation system on an FPGA. | Masato Yoshimi, Yuri Nishikawa, Yasunori Osana, Akira Funahashi, Yuichiro Shibata, Hideki Yamada, Noriko Hiroi, Hiroaki Kitano, Hideharu Amano |
| 2008 | High-speed regular expression matching engine using multi-character NFA. | Norio Yamagaki, Reetinder P. S. Sidhu, Satoshi Kamiya |
| 2008 | An ILP formulation for architectural synthesis and application mapping on FPGA-based hybrid multi-processor SOC. | Jason Wu, John Williams, Neil W. Bergmann |
| 2008 | FPGA acceleration of quasi-Monte Carlo in finance. | Nathan A. Woods, Tom Van Court |
| 2008 | A low overhead fault tolerant FPGA with new connection box. | Fujie Wong, Yajun Ha |
| 2008 | Combating process variation on FPGAS with a precise at-speed delay measurement method. | Justin S. J. Wong, Peter Y. K. Cheung, N. Pete Sedcole |
| 2008 | Area and reconfiguration time minimization of the communication network in regular 2D reconfigurable architectures. | Christophe Wolinski, Krzysztof Kuchcinski, Jrgen Teich, Frank Hannig |