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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2008Keynote: High performance computing based on FPGAS.O. Wohlmuth
2008Searching for ET with FPGA'S.Dan Werthimer
2008MacroMap: A technology mapping algorithm for heterogeneous FPGAs with effective area estimation.Xing Wei, Juanjuan Chen, Qiang Zhou, Yici Cai, Jinian Bian, Xianlong Hong
2008Shared reconfigurable architectures for CMPS.Matthew A. Watkins, Mark J. Cianchetti, David H. Albonesi
2008A link removal methodology for Networks-on-Chip on reconfigurable systems.Daihan Wang, Hiroki Matsutani, Hideharu Amano, Michihiro Koibuchi
2008A technique for minimizing power during FPGA placement.Kristofer Vorwerk, Madhu Raman, Julien Dunoyer, Yaun-Chung Hsu, Arun Kundu, Andrew A. Kennings
2008Compiled hardware acceleration of Molecular Dynamics code.Jason R. Villarreal, Walid A. Najjar
2008Three-stage pipeline implementation for SHA2 using data forwarding.Anh Tuan Hoang, Katsuhiro Yamazaki, Shigeru Oyanagi
2008Design of a high speed pseudo-random bit sequence based time resolved single photon counter on FPGA.Haiting Tian, Shakith Fernando, Hock Wei Soon, Yajun Ha, Nanguang Chen
2008Sampling from the exponential distribution using independent Bernoulli variates.David B. Thomas, Wayne Luk
2008Exploring compact design on high throughput coarse grained reconfigurable architectures.Kazuya Tanigawa, Tetsuya Zuyama, Takuro Uchida, Tetsuo Hironaka
2008An efficient run-time router for connecting modules in FPGAS.Jorge Surs, Cameron D. Patterson, Peter Athanas
2008Mining Association Rules with systolic trees.Song Sun, Joseph Zambreno
2008Acceleration of a production rigid molecule docking code.Bharat Sukhwani, Martin C. Herbordt
2008Performance optimization by track swapping on critical paths utilizing random variations for FPGAS.Yuuri Sugihara, Yohei Kume, Kazutoshi Kobayashi, Hidetoshi Onodera
2008Fault tolerant methods for reliability in FPGAs.Edward A. Stott, N. Pete Sedcole, Peter Y. K. Cheung
2008Bitstream compression techniques for Virtex 4 FPGAs.Radu Andrei Stefan, Sorin Dan Cotofana
2008File system access from reconfigurable FPGA hardware processes in BORPH.Hayden Kwok-Hay So, Robert W. Brodersen
2008Resource allocation algorithm and OpenMP extensions for parallel execution on a heterogeneous reconfigurable platform.Vlad Mihai Sima, Elena Moscu Panainte, Koen Bertels
2008Generation of partial FPGA configurations at run-time.Miguel Lino Silva, Joo Canas Ferreira
2008An optimization method of DMA transfer for a general purpose reconfigurable machine.Sayaka Shida, Yuichiro Shibata, Kiyoshi Oguri, Duncan A. Buell
2008Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip.Matthew Shelburne, Cameron D. Patterson, Peter Athanas, Mark Jones, Brian S. Martin, Ryan Fong
2008IEEE802.16-2004 OFDM functions implementation on FPGAS with design exploration.Ahmad Sghaier, Shawki Areibi, Robert D. Dony
2008SAT-based resource binding for reducing critical path delays.Kenshu Seto, Yuta Nonaka, Takuya Maruizumi, Yasuhiro Shiraki
2008Fast and accurate resource estimation of RTL-based designs targeting FPGAS.Paul Schumacher, Pradip Jha
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