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Luca Sterpone

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

77

Venues

20

Active years

2004–2026

Best venue rank

C

Where they publish

Papers

77 indexed papers, newest first.

YearVenueTitleAuthors
2026DATELate Breaking Results: Never-Stopping Inference: Self-Healing AI Accelerators on SRAM-FPGAs.Eleonora Vacca, Giorgio Cora, Luca Sterpone
2026ICCSAReinforcing Local Safety Ecosystems: Integrating the "Signal for Help" Detection in Urban and Inner Territories.Federico Buccellato, Sarah Azimi, Corrado De Sio, Luca Sterpone
2026IOLTSHardware-Aware Runtime Detection of Soft-Error Anomalies in DPU-Accelerated Neural Networks.Federico Buccellato, Corrado De Sio, Sarah Azimi, Luca Sterpone
2025DSDOn-Hardware Resilience Analysis of DPUAccelerated CNNs on FPGA-Based Systems.Federico Buccellato, Corrado De Sio, Sarah Azimi, Luca Sterpone
2025DSDEnabling Time-Aware Priority Traffic Management over Distributed FPGA Nodes.Alberto Scionti, Paolo Savio, Francesco Lubrano, Federico Stirano, Antonino Nespola, Olivier Terzo, Corrado De Sio, Luca Sterpone
2025FPLRoutino: Accelerating FPGA Routing Through Efficient Memory Representation.Davide Nicolini, Corrado De Sio, Eleonora Vacca, Luca Sterpone
2025ICIAPFault Tolerant Multi-object Tracking via Temporal Consistency Filtering.Rosario Milazzo, Sophie M. Fosson, Lia Morra, Luca Sterpone
2024DDECSA New Reliability Analysis of RISC-V Soft Processor for Safety-Critical Systems.Giorgio Cora, Corrado De Sio, Daniele Rizzieri, Sarah Azimi, Luca Sterpone
2024DDECSOn the Fault Tolerance of Self-Supervised Training in Convolutional Neural Networks.Rosario Milazzo, Vincenzo De Marco, Corrado De Sio, Sophie M. Fosson, Lia Morra, Luca Sterpone
2024ITCToward Fault-Tolerant Applications on Reconfigurable Systems-on-Chip.Corrado De Sio, Luca Sterpone
2023DATEEuFRATE: European FPGA Radiation-hardened Architecture for Telecommunications.Ludovica Bozzoli, Antonino Catanese, Emilio Fazzoletto, Eugenio Scarpa, Diana Goehringer, Sergio A. Pertuz, Lester Kalms, Cornelia Wulf, Najdet Charaf, Luca Sterpone, Sarah Azimi, Daniele Rizzieri, Salvatore Gabriele La Greca, David Merodio Codinachs, Stephen King
2023DATEAssessing Convolutional Neural Networks Reliability through Statistical Fault Injections.Annachiara Ruospo, Gabriele Gavarini, Corrado De Sio, Juan-David Guerrero-Balaguera, Luca Sterpone, Matteo Sonza Reorda, Ernesto Snchez, Riccardo Mariani, Joseph Aribido, Jyotika Athavale
2023DDECSA Comprehensive Analysis of Transient Errors on Systolic Arrays.Eleonora Vacca, Sarah Azimi, Luca Sterpone
2023DSNProgrammable SEL Test Monitoring System for Radiation Hardness Assurance.Daniele Rizzieri, Sarah Azimi, Luca Sterpone, Corrado De Sio, Thomas Borel, Viyas Gupta, Margherita Cardi
2023ICCDRunSAFER: A Novel Runtime Fault Detection Approach for Systolic Array Accelerators.Eleonora Vacca, Giorgio Ajmone, Luca Sterpone
2023ISPDCDesign Techniques for Multi-Core Neural Network Accelerators on Radiation-Hardened FPGAs.Andrea Portaluri, Sarah Azimi, Luca Sterpone
2023ISTASEnhanced Video Surveillance Systems for "Signal for Help" Detection on Edge Devices.Sarah Azimi, Corrado De Sio, Luca Sterpone
2022ETSTest, Reliability and Functional Safety Trends for Automotive System-on-Chip.Francesco Angione, Davide Appello, Joseph Aribido, Jyotika Athavale, Nicol Bellarmino, Paolo Bernardi, Riccardo Cantoro, Corrado De Sio, Tommaso Foscale, Gabriele Gavarini, Juan-David Guerrero-Balaguera, Martin Huch, Giusy Iaria, Tobias Kilian, Riccardo Mariani, Raffaele Martone, Annachiara Ruospo, Ernesto Snchez, Ulf Schlichtmann, Giovanni Squillero, Matteo Sonza Reorda, Luca Sterpone, Vincenzo Tancorre, Roberto Ugioli
2022IOLTSRadiation-induced Effects on DMA Data Transfer in Reconfigurable Devices.Andrea Portaluri, Sarah Azimi, Corrado De Sio, Luca Sterpone, David Merodio Codinachs
2022ISPDCAnalysis and Mitigation of Soft-Errors on High Performance Embedded GPUs.Luca Sterpone, Sarah Azimi, Corrado De Sio, Filippo Parisi
2021DATEA 3-D LUT Design for Transient Error Detection Via Inter-Tier In-Silicon Radiation Sensor.Sarah Azimi, Corrado De Sio, Luca Sterpone
2021IOLTSA New Domains-based Isolation Design Flow for Reconfigurable SoCs.Andrea Portaluri, Corrado De Sio, Sarah Azimi, Luca Sterpone
2020DATERESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems.Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendrfer, Christian Sauer, Anton Klotz, Michael Hbner, Jrg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka
2020DDECSA dynamic hardware redundancy mechanism for the in-field fault detection in cores of GPGPUs.Josie E. Rodriguez Condia, Pierpaolo Narducci, Matteo Sonza Reorda, Luca Sterpone
2020IOLTSIn-Circuit Mitigation Approach of Single Event Transients for 45nm Flip-Flops.Sarah Azimi, Corrado De Sio, Luca Sterpone
2020IOLTSMachine Learning Clustering Techniques for Selective Mitigation of Critical Design Features.Thomas Lange, Aneesh Balakrishnan, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone
2020ITCDigital Design Techniques for Dependable High Performance Computing.Sarah Azimi, Luca Sterpone
2020VTSA dynamic reconfiguration mechanism to increase the reliability of GPGPUs.Josie E. Rodriguez Condia, Pierpaolo Narducci, Matteo Sonza Reorda, Luca Sterpone
2019DDECSA new FPGA-based Detection Method for Spurious Variations in PCBA Power Distribution Network.Sergei Odintsov, Ludovica Bozzoli, Corrado De Sio, Luca Sterpone, Artur Jutman
2019DSNOn the Estimation of Complex Circuits Functional Failure Rate by Machine Learning Techniques.Thomas Lange, Aneesh Balakrishnan, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone
2019ETSOn the Evaluation of the PIPB Effect within SRAM-based FPGAs.Corrado De Sio, Sarah Azimi, Luca Sterpone
2019IOLTSMachine Learning to Tackle the Challenges of Transient and Soft Errors in Complex Circuits.Thomas Lange, Aneesh Balakrishnan, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone
2018ETSOn the mitigation of single event transients on flash-based FPGAs.Sarah Azimi, Boyang Du, Luca Sterpone
2018IOLTSAbout the functional test of the GPGPU scheduler.Boyang Du, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Luca Sterpone
2018ISCASIbIS: Interface-based Interconnection Structure for Dynamically Reconfigurable FPGAs.Ludovica Bozzoli, Luca Sterpone
2018RSPPyXEL: An Integrated Environment for the Analysis of Fault Effects in SRAM-Based FPGA Routing.Ludovica Bozzoli, Corrado De Sio, Luca Sterpone, Cinzia Bernardeschi
2017IOLTSAnalysis of radiation-induced cross domain errors in TMR architectures on SRAM-based FPGAs.Luca Sterpone, Luca Boragno
2017ITCFault tolerant electronic system design.Boyang Du, Luca Sterpone
2016ETSA new EDA flow for the mitigation of SEUs in dynamic reconfigurable FPGAs.Boyang Du, Luca Sterpone, David Merodio Codinachs
2016IOLTSScalable FPGA graph model to detect routing faults.Luca Sterpone, Gianpiero Cabodi, Sebastiano F. Finocchiaro, Carmelo Loiacono, Francesco Savarese, Boyang Du
2014ETSFault injection and fault tolerance methodologies for assessing device robustness and mitigating against ionizing radiation.Dan Alexandrescu, Luca Sterpone, Celia Lpez-Ongil
2014ETSReconfigurable high performance architectures: How much are they ready for safety-critical applications?Davide Sabena, Luca Sterpone, Mario Schlzel, Tobias Koal, Heinrich Theodor Vierhaus, S. Wong, Robrt Glein, Florian Rittner, C. Stender, Mario Porrmann, Jens Hagemeyer
2014ETSAnalysis and mitigation of single event effects on flash-based FPGAS.Luca Sterpone, Boyang Du
2014FPLEffective emulation of permanent faults in ASICs through dynamically reconfigurable FPGAs.Ernesto Snchez, Luca Sterpone, Anees Ullah
2014IOLTSFault injection in GPGPU cores to validate and debug robust parallel applications.M. De Carvalho, Davide Sabena, Matteo Sonza Reorda, Luca Sterpone, Paolo Rech, Luigi Carro
2014IOLTSValidation of a tool for estimating the effects of soft-errors on modern SRAM-based FPGAs.Marco Desogus, Luca Sterpone, David Merodio Codinachs
2014IOLTSA new solution to on-line detection of Control Flow Errors.Boyang Du, Matteo Sonza Reorda, Luca Sterpone, Luis Parra, Marta Portela-Garca, Almudena Lindoso, Luis Entrena
2013DATEOn-line testing of permanent radiation effects in reconfigurable systems.Luca Cassano, Dario Cozzi, Sebastian Korf, Jens Hagemeyer, Mario Porrmann, Luca Sterpone
2013ETSAn error-detection and self-repairing method for dynamically and partially reconfigurable systems.Matteo Sonza Reorda, Luca Sterpone, Anees Ullah
2013IOLTSExploiting the debug interface to support on-line test of control flow errors.Boyang Du, Matteo Sonza Reorda, Luca Sterpone, Luis Parra, Marta Portela-Garca, Almudena Lindoso, Luis Entrena
2012DATEA new SBST algorithm for testing the register file of VLIW processors.Davide Sabena, Matteo Sonza Reorda, Luca Sterpone
2012PDPA New Fault Injection Approach for Testing Network-on-Chips.Luca Sterpone, Davide Sabena, Matteo Sonza Reorda
2011DATEA new reconfigurable clock-gating technique for low power SRAM-based FPGAs.Luca Sterpone, Luigi Carro, Debora Matos, Stephan Wong, F. Fakhar
2011DDECSFault injection analysis of transient faults in clustered VLIW processors.Luca Sterpone, Davide Sabena, Salvatore Campagna, Matteo Sonza Reorda
2011ETSA Low-Cost Emulation System for Fast Co-verification and Debug.Jorge Luis Lagos-Benites, Michelangelo Grosso, Luca Sterpone, Matteo Sonza Reorda, G. Audisio, M. Pipponzi, Marco Sabatini
2010DATEA new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs.Luca Sterpone, Niccol Battezzati
2010DDECSOn the mitigation of SET broadening effects in integrated circuits.Luca Sterpone, Niccol Battezzati
2010ETSAn integrated flow for the design of hardened circuits on SRAM-based FPGAs.Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Niccol Battezzati, Luca Sterpone, Massimo Violante
2010ISCASA novel scalable and reconfigurable emulation platform for embedded systems verification.M. Di Marzio, Michelangelo Grosso, Matteo Sonza Reorda, Luca Sterpone, G. Audisio, Marco Sabatini
2009DATEA study of the Single Event Effects impact on functional mapping within Flash-based FPGAs.Francesco Abate, Luca Sterpone, Massimo Violante, Fernanda Lima Kastensmidt
2009FPLSoft errors in Flash-based FPGAs: Analysis methodologies and first results.Niccol Battezzati, Filomena Decuzzi, Luca Sterpone, Massimo Violante
2008BIBEDifferential gene expression graphs: A data structure for classification in DNA microarrays.Alfredo Benso, Stefano Di Carlo, Gianfranco Politano, Luca Sterpone
2008CIBCBA graph-based representation of Gene Expression profiles in DNA microarrays.Alfredo Benso, Stefano Di Carlo, Gianfranco Politano, Luca Sterpone
2008DATEOn the design of tunable fault tolerant circuits on SRAM-based FPGAs for safety critical applications.Luca Sterpone, M. A. Aguirre, Jonathan Noel Tombs, Hiplito Guzmn-Miranda
2008IOLTSOn the Evaluation of Radiation-Induced Transient Faults in Flash-Based FPGAs.Niccol Battezzati, Simone Gerardin, Andrea Manuzzato, Alessandro Paccagnella, Sana Rezgui, Luca Sterpone, Massimo Violante
2007DDECSAn Experimental Analysis of SEU Sensitiveness on System Knowledge-based Hardening Techniques.Oscar Ruano, Pilar Reyes, Juan Antonio Maestro, Luca Sterpone, Pedro Reviriego
2007ETSStatic and Dynamic Analysis of SEU Effects in SRAM-Based FPGAs.Luca Sterpone, Massimo Violante
2007IOLTSSelf Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders.Salvatore Pontarelli, Luca Sterpone, Gian Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante
2006DATEA new approach to compress the configuration information of programmable devices.Maurizio Martina, Guido Masera, Andrea Molino, Fabrizio Vacca, Luca Sterpone, Massimo Violante
2006DDECSReCoM: A New Reconfigurable Compute Fabric Architecture for Computation-Intensive Applications.Luca Sterpone, Massimo Violante
2006ETSFault Injection-based Reliability Evaluation of SoPCs.Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Marta Portela-Garca, Celia Lpez-Ongil, Luis Entrena
2006IOLTSDependability Evaluation of Transient Fault Effects in Reconfigurable Compute Fabric Devices.Luca Sterpone, Massimo Violante
2005DATEOn the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs.Fernanda Lima Kastensmidt, Luca Sterpone, Luigi Carro, Matteo Sonza Reorda
2005ETSMultiple errors produced by single upsets in FPGA configuration memory: a possible solution.Matteo Sonza Reorda, Luca Sterpone, Massimo Violante
2005GECCONew evolutionary techniques for test-program generation for complex microprocessor cores.Ernesto Snchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero, Luca Sterpone, Massimo Violante
2005IOLTSEfficient Estimation of SEU Effects in SRAM-Based FPGAs.Matteo Sonza Reorda, Luca Sterpone, Massimo Violante
2004IOLTSOn the Evaluation of SEU Sensitiveness in SRAM-Based FPGAs.Paolo Bernardi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante