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Prithviraj Banerjee

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

147

Venues

32

Active years

1983–2025

Best venue rank

A*

Where they publish

Papers

147 indexed papers, newest first.

YearVenueTitleAuthors
2025CVPRHOT3D: Hand and Object Tracking in 3D from Egocentric Multi-View Videos.Prithviraj Banerjee, Sindi Shkodrani, Pierre Moulon, Shreyas Hampali, Shangchen Han, Fan Zhang, Linguang Zhang, Jade Fountain, Edward Miller, Selen Basol, Richard A. Newcombe, Robert Wang, Jakob Julian Engel, Tomas Hodan
2022CVPRIdentity Preserving Loss for Learned Image Compression.Jiuhong Xiao, Lavisha Aggarwal, Prithviraj Banerjee, Manoj Aggarwal, Grard G. Medioni
2014ACCVMulti-state Discriminative Video Segment Selection for Complex Event Classification.Prithviraj Banerjee, Ram Nevatia
2014ECCVPose Filter Based Hidden-CRF Models for Activity Detection.Prithviraj Banerjee, Ramakant Nevatia
2012ICPRPose based activity recognition using Multiple Kernel learning.Prithviraj Banerjee, Ramakant Nevatia
2011AVSSLearning neighborhood cooccurrence statistics of sparse features for human activity recognition.Prithviraj Banerjee, Ram Nevatia
2011CGOThe runtime abort graph and its application to software transactional memory optimization.Dhruva R. Chakrabarti, Prithviraj Banerjee, Hans-Juergen Boehm, Pramod G. Joisha, Robert S. Schreiber
2011POPLA technique for the effective and automatic reuse of classical compiler optimizations on multithreaded code.Pramod G. Joisha, Robert S. Schreiber, Prithviraj Banerjee, Hans-Juergen Boehm, Dhruva R. Chakrabarti
2010AVSSDynamics Based Trajectory Segmentation for UAV videos.Prithviraj Banerjee, Ram Nevatia
2009ASPDACComplete-k-distinguishability for retiming and resynthesis equivalence checking without restricting synthesis.Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee
2009FPGAStreaming implementation of a sequential decompression algorithm on an FPGA.Gaurav Mittal, David Zaretsky, Prithviraj Banerjee
2009ISCASAn Automated Algorithm to Generate Stream Programs.Lei Gao, Gaurav Mittal, David Zaretsky, Dan Schonfeld, Prithviraj Banerjee
2009ISCASStreaming Implementation of the ZLIB Decoder Algorithm on an FPGA.David Zaretsky, Gaurav Mittal, Prithviraj Banerjee
2008ASPDACA dynamic-programming algorithm for reducing the energy consumption of pipelined System-Level streaming applications.Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee
2008EMSOFTState space abstraction for parameterized self-stabilizing embedded systems.Nikolaos D. Liveris, Hai Zhou, Robert P. Dick, Prithviraj Banerjee
2007ASPDACRetiming for Synchronous Data Flow Graphs.Nikolaos D. Liveris, Chuan Lin, J. Wang, Hai Zhou, Prithviraj Banerjee
2006DATESmart bit-width allocation for low power optimization in a systemc based ASIC design environment.Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou
2005DACLeakage power optimization with dual-VXiaoyong Tang, Hai Zhou, Prithviraj Banerjee
2005VLSIDBehavioral Synthesis of Data-Dominated Circuits for Minimal Energy Implementation.Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee
2004DACAutomatic translation of software binaries onto FPGAs.Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee
2004DACAn algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design.Sanghamitra Roy, Prithviraj Banerjee
2004DATEPower Aware Interface Synthesis for Bus-Based SoC Design.Nikolaos D. Liveris, Prithviraj Banerjee
2004FCCMOverview of the FREEDOM Compiler for Mapping DSP Software to FPGAs.David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee
2004FPGAHigh level area, delay and power estimation for FPGAs.Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee
2004FPGAAn algorithm for trading off quantization error with hardware resources for MATLAB based FPGA design.Sanghamitra Roy, Debjit Sinha, Prithviraj Banerjee
2003CCThe MAGICA Type Inference Engine for MATLAB.Pramod G. Joisha, Prithviraj Banerjee
2003FCCMAutomatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design.Prithviraj Banerjee, Debabrata Bagchi, Malay Haldar, Anshuman Nayak, Victor Kim, R. Uribe
2003FCCMAn Automated and Power-Aware Framework for Utilization of IP Cores in Hardware Generated from C Descriptions Targeting FPGAs.Alex K. Jones, Prithviraj Banerjee
2003FPGAMaking area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs.Prithviraj Banerjee, Vikram Saxena, Juan Ramon Uribe, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, Robert Anderson
2003FPGAAn automated and power-aware framework for utilization of IP cores in hardware generated from C descriptions targeting FPGAs.Alex K. Jones, Prithviraj Banerjee
2003PLDIStatic array storage optimization in MATLAB.Pramod G. Joisha, Prithviraj Banerjee
2002CASESPACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations.Alex K. Jones, Debabrata Bagchi, Satrajit Pal, Xiaoyong Tang, Alok N. Choudhary, Prithviraj Banerjee
2002DATEAccurate Area and Delay Estimators for FPGAs.Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prithviraj Banerjee
2001ASPDACAutomated synthesis of pipelined designs on FPGAs for signal and image processing applications described in MATLAB.Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee
2001DATEPrecision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs.Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prithviraj Banerjee
2001ICCADA System for Synthesizing Optimized FPGA Hardware from MATLAB.Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee
2001ICSGlobal optimization techniques for automatic parallelization of hybrid applications.Dhruva R. Chakrabarti, Prithviraj Banerjee
2001VLSIDFpga Hardware Synthesis From Matlab.Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee, U. Nagaraj Shenoy
2001VLSIDEfficient Synthesis of Array Intensive Computations onto FPGA Based Accelerators.U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary, Mahmut T. Kandemir
2000CASESScheduling algorithms for automated synthesis of pipelined designs on FPGAs for applications described in MATLAB.Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee
2000DATEA System-Level Synthesis Algorithm with Guaranteed Solution Quality.U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary
2000FCCMA MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems.Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary, Scott Hauck, C. Bachmann, Malay Haldar, Pramod G. Joisha, Alex K. Jones, Abhay Kanhere, Anshuman Nayak, S. Periyacheri, M. Walkden, David Zaretsky
2000FPGAA C compiler for a processor with a reconfigurable functional unit.Zhi Alex Ye, U. Nagaraj Shenoy, Prithviraj Banerjee
2000ICCDComparative Study of Parallel Algorithms for 3-D Capacitance Extraction on Distributed Memory Multiprocessors.Yanhong Yuan, Prithviraj Banerjee
2000ICPPMatch Virtual Machine: An Adaptive Runtime System to Execute MATLAB in Parallel.Malay Haldar, Anshuman Nayak, Abhay Kanhere, Pramod G. Joisha, U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee
2000ICPPFine-Grained Parallel VLSI Synthesis for Commercial CAD on a Network of Workstations.Victor Kim, Prithviraj Banerjee, Kaushik De
2000ISCACHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit.Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithviraj Banerjee
1999DACAn Approxmimate Algorithm for Delay-Constraint Technology Mapping.Sumit Roy, Krishna P. Belkhale, Prithviraj Banerjee
1999HiPCA Parallel 3-D Capacitance Extraction Program.Yanhong Yuan, Prithviraj Banerjee
1999ICPPA Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformations.Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
1999ISCASParallel construction algorithms for BDDs.Jer-Sheng Chen, Prithviraj Banerjee
1999ICSAn integer linear programming approach for optimizing cache locality.Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguad
1999VLSIDSimultaneous Scheduling, Binding and Floorplanning for Interconnect Power Optimization.Pradeep Prabhakaran, Prithviraj Banerjee, Jim E. Crenshaw, Majid Sarrafzadeh
1998DACAn Implicit Algorithm for Finding Steady States and its Application to FSM Verification.Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee
1998DACParallel Algorithms for Power Estimation.Victor Kim, Prithviraj Banerjee
1998DACPotential-NRG: Placement with Incomplete Data.Maogang Wang, Prithviraj Banerjee, Majid Sarrafzadeh
1998DATEPowerShake: A Low Power Driven Clustering and Factoring Methodology for Boolean Expressions.Sumit Roy, Harm Arts, Prithviraj Banerjee
1998EuroParEnhancing Spatial Locality via Data Layout Optimizations.Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy, Prithviraj Banerjee
1998HiPCWADE: a Web-based automated parallel CAD environment.Dhruva R. Chakrabarti, Pramod G. Joisha, John A. Chandy, Krishnaswamy Krishnaswamy, Venkatram Krishnaswamy, Prithviraj Banerjee
1998ICCADEfficient equivalence checking of multi-phase designs using retiming.Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee
1998ICCADPowerDrive: a fast, canonical POWER estimator for DRIVing synthEsis.Sumit Roy, Harm Arts, Prithviraj Banerjee
1998ICCDA low-power logic optimization methodology based on a fast power-driven mapping.Sumit Roy, Harm Arts, Prithviraj Banerjee
1998ICPPMinimizing Data and Synchronization Costs in One-Way Communication.Mahmut T. Kandemir, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam, Alok N. Choudhary
1998ICPPA Parallel Algorithm for Timing-driven Global Routing for Standard Cells.Zhaoyun Xing, Prithviraj Banerjee
1998ICSAn Efficient Uniform Run-time Scheme for Mixed Regular-irregular Applications.Dhruva R. Chakrabarti, U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee
1998ICSA Hyperplane Based Approach for Optimizing Spatial Locality in Loop Nests.Mahmut T. Kandemir, Alok N. Choudhary, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam
1998ICSParallel Compiled Event Driven VHDL Simulation.Venkatram Krishnaswamy, Prithviraj Banerjee
1998MICROImproving Locality Using Loop and Data Transformations in an Integrated Framework.Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
1998VLSIDSimultaneous Scheduling, Binding and Floorplanning in High-level Synthesis.Pradeep Prabhakaran, Prithviraj Banerjee
1998VLSIDPartitioning sequential circuits for low power.Sumit Roy, Prithviraj Banerjee, Majid Sarrafzadeh
1997ASPDACA procedure for software synthesis from VHDL models.Venkatram Krishnaswamy, Rajesh Gupta, Prithviraj Banerjee
1997DACAn Efficient Assertion Checker for Combinational Properties.Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee
1997ICCDA Parallel Circuit-Partitioned Algorithm for Timing Driven Cell Placement.John A. Chandy, Prithviraj Banerjee
1997ICPPExploiting task and data parallelism in parallel Hough and Radon transforms.Dilip Krishnaswamy, Prithviraj Banerjee
1997ICPPLoad Balancing and Workload Minimization Of Overlapping Parallel Tasks.Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee
1997ICSPerformance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors.John G. Holm, John A. Chandy, Steven Parkes, Sumit Roy, Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee
1997PADSAsynchronous Parallel Algorithms for Test Set Partitioned Fault Simulation.Dilip Krishnaswamy, Prithviraj Banerjee, Elizabeth M. Rudnick, Janak H. Patel
1997VLSIDSimulated Annealing Based Parallel State Assignment of Finite State Machines.Gagan Hasteer, Prithviraj Banerjee
1997VLSIDParallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation.Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxena, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee
1997VTSSPITFIRE: scalable parallel algorithms for test set partitioned fault simulation.Dilip Krishnaswamy, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee
1996EuroParA Parallel Algorithm for the Technology Mapping of LUT-Based FPGAs.Vamsi Boppana, Prashant Saxena, Prithviraj Banerjee, W. Kent Fuchs, C. L. Liu
1996ICCDParallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs.Pradeep Prabhakaran, Prithviraj Banerjee
1996ICPPA Parallel Algorithm for State Assignment of Finite State Machines.Gagan Hasteer, Prithviraj Banerjee
1996ICPPCompiler Support for Privatization on Distributed-Memory Machines.Daniel J. Palermo, Ernesto Su, Eugene W. Hodges IV, Prithviraj Banerjee
1996ICSCompiler Support for Hybrid Irregular Accesses on Multicomputers.Antonio Lain, Prithviraj Banerjee
1996PADSActor Based Parallel VHDL Simulation Using Time Warp.Venkatram Krishnaswamy, Prithviraj Banerjee
1996VLSIDParallel simulated annealing strategies for VLSI cell placement.John A. Chandy, Prithviraj Banerjee
1995ICCDA parallel algorithm for fault simulation based on PROOFS .Steven Parkes, Prithviraj Banerjee, Janak H. Patel
1995ICSAdvanced Compilation Techniques in the PARADIGM Compiler for Distributed-memory Multicomputers.Ernesto Su, Antonio Lain, Shankar Ramaswamy, Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee
1994DACProperHITEC: A Portable, Parallel, Object-Oriented Approach to Sequential Test Generation.Steven Parkes, Prithviraj Banerjee, Janak H. Patel
1994ICPPParallel Logic Synthesis Using Partitioning.Kaushik De, Prithviraj Banerjee
1994ICPPCommunication Optimizations Used in the PARADIGM Compiler for Distributed Memory Multicomputers.Daniel J. Palermo, Ernesto Su, John A. Chandy, Prithviraj Banerjee
1994ICPPA Convex Programming Approach for Exploiting Data and Functional Parallelism on Distributed Memory Multicomputers.Shankar Ramaswamy, Sachin S. Sapatnekar, Prithviraj Banerjee
1994ICSTechniques to overlap computation and communication in irregular iterative applications.Antonio Lain, Prithviraj Banerjee
1994SCA library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application.Steven Parkes, John A. Chandy, Prithviraj Banerjee
1993DACNon-Scan Design-for-Testability Techniques for Sequential Circuits.Vivek Chickermane, Elizabeth M. Rudnick, Prithviraj Banerjee, Janak H. Patel
1993ICPPReliability Evalutaion of Disk Array Architectures.John A. Chandy, Prithviraj Banerjee
1993ICPPProcessor Allocation and Scheduling of Macro Dataflow Graphs on Distributed Memory Multicomputers by the PARADIGM Compiler.Shankar Ramaswamy, Prithviraj Banerjee
1993ICPPA Fault-Tolerant Parallel Algorithm for Iterative Solution of the Laplace Equation.Amber Roy-Chowdhury, Prithviraj Banerjee
1993ICPPAutomating Parallelization of Regular Computations for Distributed-Memory.Ernesto Su, Daniel J. Palermo, Prithviraj Banerjee
1993ICSPARADIGM: A Compiler for Automatic Data Distribution on Multicomputers.Manish Gupta, Prithviraj Banerjee
1993VLSIDA Shared Memory Parallel Algorithm for Logic Synthesis.Chieng-Fai Lim, Prithviraj Banerjee, Kaushik De, Saburo Muroga
1992DACAPT: An Area-Performance-Testability Driven Placement Algorithm.Sungho Kim, Prithviraj Banerjee, Vivek Chickermane, Janak H. Patel
1992ICCADProperSYN: a portable parallel algorithm for logic synthesis.Kaushik De, Balkrishna Ramkumar, Prithviraj Banerjee
1992ICCADPortable parallel test generation for sequential circuits.Balkrishna Ramkumar, Prithviraj Banerjee
1992ICCDProperCAd: A Portable Object-Oriented Parallel Environment for VLSI CAD.Balkrishna Ramkumar, Prithviraj Banerjee
1992ICPPLow Cost Concurrent Error Detection in a VLIW Architecture Using Replicated Instructions.John G. Holm, Prithviraj Banerjee
1992ICSA methodology for high-level synthesis of communication on multicomputers.Manish Gupta, Prithviraj Banerjee
1991DACParallel Test Generation for Sequential Circuits on General-Purpose Multiprocessors.Srinivas Patil, Prithviraj Banerjee, Janak H. Patel
1991ICPPCRAFT: Compiler-Assisted Algorithm-Based Fault Tolerance in Distributed Memory Multiprocessors.Vijay Balasubramanian, Prithviraj Banerjee
1991ICPPPerformance Evaluation of Hardware Support for Message Passing in Distributed Memory Multicomputers.Jiun-Ming Hsu, Prithviraj Banerjee
1991ICPPCompiler Support for Parallel I/O Operations.A. L. Narasimha Reddy, Prithviraj Banerjee, D. K. Chen
1991ITCLogic Partitioning and Resynthesis for Testability.Kaushik De, Prithviraj Banerjee
1991ITCA Layout Driven Design for Testability Technique for MOS VLSI Circuits.Sungho Kim, Prithviraj Banerjee, Srinivas Patil
1990DACPHIGURE: A Parallel Hierarchical Global Router.Randall J. Brouwer, Prithviraj Banerjee
1990DACOptimization by Simulated Evolution with Applications to Standard Cell Placement.Ralph-Michael Kling, Prithviraj Banerjee
1990ICCADA Parallel Algorithm for Hierarchical Circuit Extraction.Krishna P. Belkhale, Prithviraj Banerjee
1990ICCADSNEL: A Switch-Level Simulator Using Multiple Levels of Functional Abstraction.David T. Blaauw, Robert B. Mueller-Thuns, Daniel G. Saab, Prithviraj Banerjee, Jacob A. Abraham
1990ICCDAutomatic classification of node types in switch-level descriptions.David T. Blaauw, Prithviraj Banerjee, Jacob A. Abraham
1990ICPPAn Approximate Algorithm for the Partitionable Independent Task Scheduling Problem.Krishna P. Belkhale, Prithviraj Banerjee
1990ICPPGeometric Connected Component Labeling on Distributed Memory Multicomputers.Krishna P. Belkhale, Prithviraj Banerjee
1990ICPPHardware Support for Message Routing in a Distributed Memory Multicomputer.Jiun-Ming Hsu, Prithviraj Banerjee
1990ISCAPerformance Measurement and Trace Driven Simulation of Parallel CAD and Numeric Applications on a Hypercube Multicomputer.Jiun-Ming Hsu, Prithviraj Banerjee
1990ISCAA Study of I/O Behavior of Perfect Benchmarks on a Multiprocessor.A. L. Narasimha Reddy, Prithviraj Banerjee
1990SCA message passing coprocessor for distributed memory multicomputers.Jiun-Ming Hsu, Prithviraj Banerjee
1989DACA Parallel Branch and Bound Algorithm for Test Generation.Srinivas Patil, Prithviraj Banerjee
1989DACA Parallel Row-based Algorithm for Standard Cell Placement with Integrated Error Control.Jeff S. Sargent, Prithviraj Banerjee
1989ICCADPACE2: an improved parallel VLSI extractor with parameter extraction.Krishna P. Belkhale, Prithviraj Banerjee
1989ICCADAn accurate timing model for fault simulation in MOS circuits.Sungho Kim, Prithviraj Banerjee
1989ICPPAlgorithm-Based Fault Tolerance for Adaptive Least Squares Lattice Filtering on a Hypercube Multiprocessor.Robert B. Mueller-Thuns, David McFarland, Prithviraj Banerjee
1989ICPPPerformance Evaluation of Multiple-Disk I/O Systems.A. L. Narasimha Reddy, Prithviraj Banerjee
1989ICSI/O issues for hypercubes.A. L. Narasimha Reddy, Prithviraj Banerjee
1989ITCFault Partitioning Issues in an Integrated Parallel Test Generation/Fault Simulation Environment.Srinivas Patil, Prithviraj Banerjee
1989SCEfficient circuit partitioning algorithms for parallel logic simulation.Srinivas Patil, Prithviraj Banerjee, Constantine D. Polychronopoulos
1989RTSSAlgorithm-based Error Detection for Signal Processing Applications on a Hypercube Multiprocessor.Vijay Balasubramanian, Prithviraj Banerjee
1988ICCADPACE: a parallel VLSI extractor on the Intel hypercube multiprocessor.Krishna P. Belkhale, Prithviraj Banerjee
1988ICCDA parallel simulated annealing algorithm for channel routing on a hypercube multiprocessor.Randall J. Brouwer, Prithviraj Banerjee
1988ICPPI/O Embedding in Hypercubes.A. L. Narasimha Reddy, Prithviraj Banerjee
1987DACPerformance of a Parallel Algorithm for Standard Cell Placement on the Intel Hypercube.Mark Jones, Prithviraj Banerjee
1987DACESP: A New Standard Cell Placement Package Using Simulated Evolution.Ralph-Michael Kling, Prithviraj Banerjee
1987ICDEA Fault Secure Dictionary Machine.A. L. Narasimha Reddy, Prithviraj Banerjee
1987RTSSA Fixed Size Array Processor for Computing the Fast Fourier Transform.Vijay Balasubramanian, Prithviraj Banerjee
1986ICPPRECBAR : A Reconfigurable Massively Parallel Processing Architecture.Vijay Balasubramanian, Prithviraj Banerjee
1986ICPPA Fault-Tolerant Interconnection Network Supporting the Fetch-And-Add Primitive.Prithviraj Banerjee, Abhijeet Dugar
1986RTSSA Probabilistic Model of Algorithm-Based Fault Tolerance in Array Processors for Real-Time Systems.Prithviraj Banerjee, Jacob A. Abraham
1984ISCAFault-Secure Algorithms for Multiple-Processor Systems.Prithviraj Banerjee, Jacob A. Abraham
1983ITCGenerating Tests for Physical Failures in MOS Logic Circuits.Prithviraj Banerjee, Jacob A. Abraham