| 2009 | A symbolic RTL synthesis for LUT-based FPGAs. | Stanislaw Deniziak, Mariusz Wisniewski |
| 2009 | Contention-avoiding custom topology generation for network-on-chip. | Stanislaw Deniziak, Robert Tomaszewski |
| 2009 | An enhanced FPGA-based low-cost tester platform exploiting effective test data compression for SoCs. | Lyl M. Ciganda, Francesco Abate, Paolo Bernardi, M. Bruno, Matteo Sonza Reorda |
| 2009 | Challenges for test and design for test. | Anton Chichkov |
| 2009 | Improve clock gating through power-optimal enable function selection. | Juanjuan Chen, Xing Wei, Yunjian Jiang, Qiang Zhou |
| 2009 | Cognitive self-adaptive computing and communication systems: Test, control and adaptation. | Abhijit Chatterjee |
| 2009 | 0.18 m CMOS UWB LNA with new feedback configuration for optimization low noise, high gain and small area. | Y. C. Chang, Hsuan-Ling Kao, C. H. Kao, C. H. Yang, Jeffrey S. Fu, Nemai C. Karmakar, Li-Chun Chang |
| 2009 | All digital baseband 50 Mbps data recovery using 5 oversampling with 0.9 data unit interval clock jitter tolerance. | Sanad Bushnaq, Toru Nakura, Makoto Ikeda, Kunihiro Asada |
| 2009 | The impact of EFSM composition on functional ATPG. | Davide Bresolin, Giuseppe Di Guglielmo, Franco Fummi, Graziano Pravadelli, Tiziano Villa |
| 2009 | Comparison of different test strategies on a mixed-signal circuit. | Juraj Brenkus, Viera Stopjakov, Ronny Vanhooren, Anton Chichkov |
| 2009 | Forward and backward guarding in early output logic. | Charlie Brej, Doug Edwards |
| 2009 | An efficient fault simulation technique for transition faults in non-scan sequential circuits. | Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Paolo Bernardi, Matteo Sonza Reorda |
| 2009 | Logic synthesis method for pattern matching circuits implementation in FPGA with embedded memories. | Grzegorz Borowik, Tadeusz Luba, Bogdan J. Falkowski |
| 2009 | Ultra low-voltage switched current mirror. | Yngvar Berg, Omid Mirmotahari |
| 2009 | Low voltage precharge CMOS logic. | Yngvar Berg, Omid Mirmotahari |
| 2009 | Comprehensive bridging fault diagnosis based on the SLAT paradigm. | Youssef Benabboud, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Laroussi Bouzaida, Isabelle Izaute |
| 2009 | Self-timed full adder designs based on hybrid input encoding. | P. Balasubramanian, David A. Edwards, Charlie Brej |
| 2009 | An analysis of the timing behavior of CMOS digital blocks under Simultaneous Switching Noise conditions. | Florence Azas, Yves Bertrand, Michel Renovell |
| 2009 | Measurement of power supply noise tolerance of self-timed processor. | Kunihiro Asada, Taku Sogabe, Toru Nakura, Makoto Ikeda |
| 2008 | Efficient Estimation of Die-Level Process Parameter Variations via the EM-Algorithm. | Amir Zjajo, Shaji Krishnan, Jos Pineda de Gyvez |
| 2008 | Network Probe for Flexible Flow Monitoring. | Martin Zdnk, Jan Korenek, Petr Kobiersk, Ondrej Lengl |
| 2008 | Continuous-Time Common-Mode Feedback Circuit for Applications with Large Output Swing and High Output Impedance. | Weixun Yan, Horst Zimmermann |
| 2008 | Probabilistic Model Checking and Reliability of Results. | Ralf Wimmer, Alexander Kortus, Marc Herbstritt, Bernd Becker |
| 2008 | A Partial Scan Based Test Generation for Asynchronous Circuits. | Dilip P. Vasudevan, Aristides Efthymiou |
| 2008 | Novel Hardware Implementation of Adaptive Median Filters. | Zdenek Vascek, Luks Sekanina |