| 2012 | Intra-masking dual-rail memory on LUT implementation for tamper-resistant AES on FPGA. | Anh-Tuan Hoang, Takeshi Fujino |
| 2012 | X-ORCA: FPGA-based wireless localization in the sub-millimeter range. | Matthias Hinkfoth, Enrico Heinrich, Sebastian Vorkper, Volker Khn, Ralf Salomon |
| 2012 | Impact of FPGA architecture on resource sharing in high-level synthesis. | Stefan Hadjis, Andrew Canis, Jason Helge Anderson, Jongsok Choi, Kevin Nam, Stephen Brown, Tomasz S. Czajkowski |
| 2012 | Functionally verifying state saving and restoration in dynamically reconfigurable systems. | Lingkan Gong, Oliver Diessel |
| 2012 | A novel full coverage test method for CLBs in FPGA (abstract only). | Yong Fu, Chi Wang, Liguang Chen, Jinmei Lai |
| 2012 | Post-silicon debugging targeting electrical errors with patchable controllers (abstract only). | Masahiro Fujita, Hiroaki Yoshida |
| 2012 | A performance and energy comparison of FPGAs, GPUs, and multicores for sliding-window applications. | Jeremy Fowers, Greg Brown, Patrick Cooke, Greg Stitt |
| 2012 | Leveraging latency-insensitivity to ease multiple FPGA design. | Kermin Elliott Fleming, Michael Adler, Michael Pellauer, Angshuman Parashar, Arvind, Joel S. Emer |
| 2012 | Saturating the transceiver bandwidth: switch fabric design on FPGAs. | Zefu Dai, Jianwen Zhu |
| 2012 | Communication visualization for bottleneck detection of high-level synthesis applications. | John Curreri, Greg Stitt, Alan D. George |
| 2012 | FPGA-RR: an enhanced FPGA architecture with RRAM-based reconfigurable interconnects (abstract only). | Jason Cong, Bingjun Xiao |
| 2012 | Prototype and evaluation of the CoRAM memory architecture for FPGA-based computing. | Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe, Ken Mai |
| 2012 | A mixed precision Monte Carlo methodology for reconfigurable accelerator systems. | Gary Chun Tak Chow, Anson Hong Tak Tse, Qiwei Jin, Wayne Luk, Philip Heng Wai Leong, David B. Thomas |
| 2012 | Speedy FPGA-based packet classifiers with low on-chip memory requirements. | Chih-Hsun Chou, Fong Pong, Nian-Feng Tzeng |
| 2012 | OpenCL memory infrastructure for FPGAs (abstract only). | S. Alexander Chin, Paul Chow |
| 2012 | Accelerating short read mapping on an FPGA (abstract only). | Yupeng Chen, Bertil Schmidt, Douglas L. Maskell |
| 2012 | FPGA-accelerated 3D reconstruction using compressive sensing. | Jianwen Chen, Jason Cong, Ming Yan, Yi Zou |
| 2012 | A lean FPGA soft processor built using a DSP block. | Hui Yan Cheah, Suhaib A. Fahmy, Douglas L. Maskell, Chidamber Kulkarni |
| 2012 | A configurable architecture to limit wakeup current in dynamically-controlled power-gated FPGAs. | Assem A. M. Bsoul, Steven J. E. Wilton |
| 2012 | A scalable approach for automated precision analysis. | David Boland, George A. Constantinides |
| 2012 | Optimizing SDRAM bandwidth for custom FPGA loop accelerators. | Samuel Bayliss, George A. Constantinides |
| 2012 | Incremental clustering applied to radar deinterleaving: a parameterized FPGA implementation. | Scott Bailie, Miriam Leeser |
| 2012 | A cycle-accurate, cycle-reproducible multi-FPGA system for accelerating multi-core processor simulation. | Sameh W. Asaad, Ralph Bellofatto, Bernard Brezzo, Chuck Haymes, Mohit Kapur, Benjamin D. Parker, Thomas Roewer, Proshanta Saha, Todd Takken, Jos A. Tierno |
| 2012 | Early timing estimation for system-level design using FPGAs (abstract only). | Hugo A. Andrade, Arkadeb Ghosal, Rhishikesh Limaye, Sadia Malik, Newton Petersen, Kaushik Ravindran, Trung N. Tran, Guoqiang Wang, Guang Yang |
| 2012 | EmPower: FPGA based emulation of dynamic power management algorithms for multi-core systems on chip (abstract only). | Sundaram Ananthanarayanan, Chirag Ravishankar, Siddharth Garg, Andrew A. Kennings |