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Masahiro Fujita

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

194

Venues

45

Active years

1986–2026

Best venue rank

A*

Where they publish

Papers

194 indexed papers, newest first.

YearVenueTitleAuthors
2026DDECSA SAT-Hard Compound Logic Locking Scheme with Empirical Resistance to Known Structural Attacks.Sonali Shukla, Govind Rajhans Jadhav, Durgesh Sardan, Suryakant Toraskar, Jaynarayan T. Tudu, Makoto Ikeda, Masahiro Fujita, Virendra Singh
2025ASPDACLearned Image Codec on FPGA: Algorithm, Architecture and System Design.Heming Sun, Jing Wang, Silu Liu, Shinji Kimura, Masahiro Fujita
2025VLSIDMulti-Object Detection Through Meta-Training in Resource-Constrained UAV-Based Surveillance Applications.Abhishek Yadav, Vyom Kumar Gupta, Kethireddy Harshith Reddy, Masahiro Fujita, Binod Kumar
2024QCEDecision Diagram vs. State Vector: A Comparative Study on Quantum Computing Simulation Efficiency.Yusuke Kimura, Shaowen Li, Hiroyuki Sato, Masahiro Fujita
2023IGARSSWireless Reference Frequency Distribution for Membrane-Deployed Distributed Microwave Interferometer Concept.Ahmed Kiyoshi Sugihara, Takehisa Wada, Tamotsu Suda, Masahiro Fujita, Shigeo Kawasaki, Osamu Mori
2023ISCASIIR Filter-Based Spiking Neural Network.Sai Sanjeet, Rahul K. Meena, Bibhu Datta Sahoo, Keshab K. Parhi, Masahiro Fujita
2022IGARSSA Single-Satellite Approach to Large Aperture Microwave Interferometric Radiometry Using Flexible Membrane Structures.Ahmed Kiyoshi Sugihara, Takehisa Wada, Tamotsu Suda, Y. Nada, Masahiro Fujita, Shigeo Kawasaki, Osamu Mori
2022VCIPReal-time Learned Image Codec on FPGA.Heming Sun, Qingyang Yi, Fangzheng Lin, Lu Yu, Jiro Katto, Masahiro Fujita
2021ASPDACA Decomposition-Based Synthesis Algorithm for Sparse Matrix-Vector Multiplication in Parallel Communication Structure.Mingfei Yu, Ruitao Gao, Masahiro Fujita
2021DATELogic Synthesis for Generalization and Learning Addition.Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita
2021DATELogic Synthesis Meets Machine Learning: Trading Exactness for Generalization.Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa, Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jnata Tyska Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
2020AINAMicro Biometric Authentication Using Fingernail Surfaces: A Study of Practical Use.Yuya Shiomi, Genki Sugimoto, Ayaka Sugimoto, Kota Uehara, Masahiro Fujita, Yuto Mano, Tetsushi Ohki, Masakatsu Nishigaki
2020DATESynthesis and Optimization of Multiple Portions of Circuits for ECO based on Set-Covering and QBF Formulations.Masahiro Fujita, Yusuke Kimura, Xingming Le, Yukio Miyasaka, Amir Masoud Gharehbaghi
2020VLSIDA Low Overhead Methodology for Validating Memory Consistency Models in Chip Multiprocessors.Binod Kumar, Swapniel Thakur, Kanad Basu, Masahiro Fujita, Virendra Singh
2019AINABasic Study on Targeted E-mail Attack Method Using OSINT.Kota Uehara, Kohei Mukaiyama, Masahiro Fujita, Hiroki Nishikawa, Takumi Yamamoto, Kiyoto Kawauchi, Masakatsu Nishigaki
2019IOLTSSecuring Scan through Plain-text Restriction.Satyadev Ahlawat, Kailash Ahirwar, Jaynarayan T. Tudu, Masahiro Fujita, Virendra Singh
2019ISCASSignal Selection Methods for Efficient Multi-Target Correction.Yusuke Kimura, Amir Masoud Gharehbaghi, Masahiro Fujita
2019ISCASLive Demonstration: Automatic Synthesis of Algorithms on Multi Chip/FPGA with Communication Constraints.Tomohiro Maruoka, Yukio Miyasaka, Akihiro Goda, Amir Masoud Gharehbaghi, Masahiro Fujita
2019ISCASHigh-Level Engineering Change Through Programmable Datapath and SMT Solvers.Qinhao Wang, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita
2019VLSIDA Methodology for SAT-Based Electrical Error Debugging During Post-Silicon Validation.Binod Kumar, Masahiro Fujita, Virendra Singh
2019VTSAn Incremental Automatic Test Pattern Generation Method for Multiple Stuck-at Faults.Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita
2018ISCASOn Securing Scan Design Through Test Vector Encryption.Darshit Vaghani, Satyadev Ahlawat, Jaynarayan T. Tudu, Masahiro Fujita, Virendra Singh
2018VLSIDELURA: A Methodology for Post-Silicon Gate-Level Error Localization Using Regression Analysis.Ankit Jindal, Binod Kumar, Kanad Basu, Masahiro Fujita
2017COMPSACDNetSpec: A Distributed Network Testing Toolset for Middleware Developers.Shintaro Ishihara, Masahiro Fujita, Toyokazu Akiyama
2017IOLTSInstruction-based self-test for delay faults maximizing operating temperature.Nihar Hage, Rohini Gulve, Masahiro Fujita, Virendra Singh
2017ISCASA new approach for diagnosing bridging faults in logic designs.Amir Masoud Gharehbaghi, Masahiro Fujita
2017ISCASTest pattern generation for multiple stuck-at faults not covered by test patterns for single faults.Conrad J. Moore, Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita
2017ISCASA low-cost approximate 32-point transform architecture.Heming Sun, Zhengxue Cheng, Amir Masoud Gharehbaghi, Shinji Kimura, Masahiro Fujita
2017VLSIDOn Testing of Superscalar Processors in Functional Mode for Delay Faults.Nihar Hage, Rohini Gulve, Masahiro Fujita, Virendra Singh
2017VLSIDA Methodology for Trace Signal Selection to Improve Error Detection in Post-Silicon Validation.Binod Kumar, Ankit Jindal, Virendra Singh, Masahiro Fujita
2016ASPDACFormally analyzing fault tolerance in datapath designs using equivalence checking.Payman Behnam, Bijan Alizadeh, Sajjad Taheri, Masahiro Fujita
2016ATVASynthesizing and Completely Testing Hardware Based on Templates Through Small Numbers of Test Patterns.Masahiro Fujita
2016HCIImplementation and Initial Evaluation of Game in Which Password Enhancement Factor is Embedded.Masahiro Fujita, Mako Yamada, Masakatsu Nishigaki
2016HCISecure Communication Protocol Between a Human and a Bank Server for Preventing Man-in-the-Browser Attacks.Takashi Tsuchiya, Masahiro Fujita, Kenta Takahashi, Takehisa Kato, Fumihiko Magata, Yoshimi Teshigawara, Ryichi Sasaki, Masakatsu Nishigaki
2016PSTDirectcha: A proposal of spatiometric mental rotation CAPTCHA.Ayane Sano, Masahiro Fujita, Masakatsu Nishigaki
2016PSTStudy on relationship between user awareness and QoE in communication delay on smartphones.Takeharu Shirai, Masahiro Fujita, Daisuke Arai, Tomohiko Ogishi, Masakatsu Nishigaki
2015DATETemperature-aware software-based self-testing for delay faults.Ying Zhang, Zebo Peng, Jianhui Jiang, Huawei Li, Masahiro Fujita
2015FPGAOn Implementation of LUT with Large Numbers of Inputs (Abstract Only).Masahiro Fujita
2015HCIChimera CAPTCHA: A Proposal of CAPTCHA Using Strangeness in Merged Objects.Masahiro Fujita, Yuki Ikeya, Junya Kani, Masakatsu Nishigaki
2015ICCDAutomatic identification of assertions and invariants with small numbers of test vectors.Masahiro Fujita
2015ITCHardware in loop testing of an insulin pump.Sriram Karunagaran, Karuna P. Sahoo, Masahiro Fujita
2015MEMOCODELogic analysis and optimization with quick identification of invariants through one time frame analysis.Masahiro Fujita
2015PSTPhysical trust-based persistent authentication.Masahiro Fujita, Christian Damsgaard Jensen, Shiori Arimura, Yuki Ikeya, Masakatsu Nishigaki
2015VTSUPF-based formal verification of low power techniques in modern processors.Reza Sharafinejad, Bijan Alizadeh, Masahiro Fujita
2014ETSImproving polynomial datapath debugging with HEDs.Somayeh Sadeghi Kohan, Payman Behnam, Bijan Alizadeh, Masahiro Fujita, Zainalabedin Navabi
2014HCIAn Image-Based CAPTCHA Using Sophisticated Mental Rotation.Yuki Ikeya, Masahiro Fujita, Junya Kani, Yuta Yoneyama, Masakatsu Nishigaki
2014ITCEfficient SAT-based ATPG techniques for all multiple stuck-at faults.Masahiro Fujita, Alan Mishchenko
2014PSTi/k-Contact: A context-aware user authentication using physical social trust.Shiori Arimura, Masahiro Fujita, Shinya Kobayashi, Junya Kani, Masakatsu Nishigaki, Akira Shiba
2014RTASMAESTRO: A time-driven embedded testbed Architecture with Event-driven Synchronization.Sriram Karunagaran, Karuna P. Sahoo, Jayaraj Poroor, Masahiro Fujita
2013FPGARectification of advanced microprocessors without changing routing on FPGAs (abstract only).Satoshi Jo, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita
2013ICCADPartial synthesis through sampling with and without specification.Masahiro Fujita, Satoshi Jo, Shohei Ono, Takeshi Matsumoto
2013ICCADHardware implementation of BLTL property checkers for acceleration of statistical model checking.Kosuke Oshima, Takeshi Matsumoto, Masahiro Fujita
2013VLSIDTutorial T10: Post - Silicon Validation, Debug and Diagnosis.Prabhat Mishra, Masahiro Fujita, Virendra Singh, Nagesh Tamarapalli, Sharad Kumar, Rajesh Mittal
2013VTSSpecial session 4B: Elevator talks.Jennifer Dworak, Ronald Shawn Blanton, Masahiro Fujita, Kazumi Hatayama, Naghmeh Karimi, Michail Maniatakos, Antonis M. Paschalis, Adit D. Singh, Tian Xia
2012ASPDACPost-silicon patching for verification/debugging with high-level models and programmable logic.Masahiro Fujita, Hiroaki Yoshida
2012ASPDACOn error tolerance and Engineering Change with Partially Programmable Circuits.Hratch Mangassarian, Hiroaki Yoshida, Andreas G. Veneris, Shigeru Yamashita, Masahiro Fujita
2012ASPDACAutomated data analysis techniques for a modern silicon debug environment.Yu-Shen Yang, Andreas G. Veneris, Nicola Nicolici, Masahiro Fujita
2012DSDSimulation-Based Analysis of Cyberphysical Systems.Masahiro Fujita
2012FPGAPost-silicon debugging targeting electrical errors with patchable controllers (abstract only).Masahiro Fujita, Hiroaki Yoshida
2012ICCDAutomatic assertion extraction in gate-level simulation using GPGPUs.Shohei Ono, Takeshi Matsumoto, Masahiro Fujita
2012IOLTSSEU tolerant robust memory cell design.Mohammed Shayan, Virendra Singh, Adit D. Singh, Masahiro Fujita
2012MEMOCODEPolynomial datapath synthesis and optimization based on vanishing polynomial over Z2Samaneh Ghandali, Bijan Alizadeh, Zainalabedin Navabi, Masahiro Fujita
2012SIGGRAPHDistance aware ray tracing for curves.Koji Nakamaru, Toru Matsuoka, Masahiro Fujita
2011ASPDACUtilizing high level design information to speed up post-silicon debugging.Masahiro Fujita
2011ASPDACOn-chip dynamic signal sequence slicing for efficient post-silicon debugging.Yeonbok Lee, Takeshi Matsumoto, Masahiro Fujita
2011ATVASynthesizing, Verifying, and Debugging SoC with FSM-Based Specification of On-Chip Communication Protocols.Masahiro Fujita
2011ETSOptimization of Assertion Placement in Time-Constrained Embedded Systems.Viacheslav Izosimov, Michele Lora, Graziano Pravadelli, Franco Fummi, Zebo Peng, Giuseppe Di Guglielmo, Masahiro Fujita
2011ISCASEarly case splitting and false path detection to improve high level ATPG techniques.Bijan Alizadeh, Masahiro Fujita
2011ICSEModel-driven design and validation of embedded software.Giuseppe Di Guglielmo, Masahiro Fujita, Luigi Di Guglielmo, Franco Fummi, Graziano Pravadelli, Cristina Marconcini, Andreas Foltinek
2011ICSoftClient-tier Validation of Dynamic Web Applications.Hideo Tanida, Masahiro Fujita, Mukul R. Prasad, Sreeranga P. Rajan
2011ICSoftAutomated System Testing of Dynamic Web Applications.Hideo Tanida, Mukul R. Prasad, Sreeranga P. Rajan, Masahiro Fujita
2011MEMOCODEEFSM-based model-driven approach to concolic testing of system-level design.Giuseppe Di Guglielmo, Masahiro Fujita, Franco Fummi, Graziano Pravadelli, Stefano Soffia
2010ASPDACGuided gate-level ATPG for sequential circuits using a high-level test generation approach.Bijan Alizadeh, Masahiro Fujita
2010CASESTowards minimizing execution delays on dynamically reconfigurable processors: a case study on REDEFINE.Ratna Krishnamoorthy, Keshavan Varadarajan, Ganesh Garga, Mythri Alle, S. K. Nandy, Ranjani Narayan, Masahiro Fujita
2010FPGAAggressive overclocking support using a novel timing error recovery technique on FPGAs (abstract only).Amir Masoud Gharehbaghi, Bijan Alizadeh, Masahiro Fujita
2010ICCADPolynomial datapath optimization using constraint solving and formal modelling.Finn Haedicke, Bijan Alizadeh, Grschwin Fey, Masahiro Fujita, Rolf Drechsler
2010ICCDGeneration of I/O sequences for a high-level design from those in post-silicon for efficient post-silicon debugging.Yeonbok Lee, Takeshi Matsumoto, Masahiro Fujita
2009DACDebugging from high level down to gate level.Masahiro Fujita, Yoshihisa Kojima, Amir Masoud Gharehbaghi
2009DACPolynomial datapath optimization using partitioning and compensation heuristics.Omid Sarbishei, Bijan Alizadeh, Masahiro Fujita
2009ICCADImproved heuristics for finite word-length polynomial datapath optimization.Bijan Alizadeh, Masahiro Fujita
2009ICCDTransaction-based debugging of system-on-chips with patterns.Amir Masoud Gharehbaghi, Masahiro Fujita
2009MEMOCODEHigh-level optimization of integer multipliers over a finite bit-width with verification capabilities.Omid Sarbishei, Mahmoud Tabandeh, Bijan Alizadeh, Masahiro Fujita
2008CSICCSequential Equivalence Checking Using a Hybrid Boolean-Word Level Decision Diagram.Bijan Alizadeh, Masahiro Fujita
2008DATEPerformance-Constrained Different Cell Count Minimization for Continuously-Sized Circuits.Hiroaki Yoshida, Masahiro Fujita
2008IROSMotion control of a virtual humanoid that can perform real physical interactions with a human.Ken'ichiro Nagasaka, Atsushi Miyamoto, Masakuni Nagano, Hirokazu Shirado, Tetsuharu Fukushima, Masahiro Fujita
2008ICRAAdaptive grasping by multi fingered hand with tactile sensor based on robust force and position control.Taro Takahashi, Toshimitsu Tsuboi, Takeo Kishida, Yasunori Kawanami, Satoru Shimizu, Masatsugu Iribe, Tetsuharu Fukushima, Masahiro Fujita
2008ICSoftA HW/SW Co-Reuse Methodology Based on Design Refinement Templates in UML Diagrams.Masahiro Fujita, Takeshi Matsumoto, Hiroaki Yoshida
2008MEMOCODEArithmetic Circuits Verification without Looking for Internal Equivalences.Omid Sarbishei, Bijan Alizadeh, Masahiro Fujita
2008MEMOCODERule-Based Approaches for Equivalence Checking of SpecC Programs.Subash Shankar, Masahiro Fujita
2007ASPDACProtocol Transducer Synthesis using Divide and Conquer approach.Shigeru Watanabe, Kenshu Seto, Yuji Ishikawa, Satoshi Komatsu, Masahiro Fujita
2007ATVAAutomatic Merge-Point Detection for Sequential Equivalence Checking of System-Level and RTL Descriptions.Bijan Alizadeh, Masahiro Fujita
2007ATVAUsing Counterexample Analysis to Minimize the Number of Predicates for Predicate Abstraction.Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita
2006ISCASAn optimization of bus interconnects pitch for low-power and reliable bus encoding scheme.Satoshi Komatsu, Masahiro Fujita
2006MEMOCODEEquivalence checking: a rule-based approach.Masahiro Fujita, Subash Shankar, Sasaki Shunsuke
2006VLSIDSequential Equivalence Checking.Anmol Mathur, Masahiro Fujita, M. Balakrishnan, Raj S. Mitra
2005FDLAMS Extensions for Timed/Untimed System-Level Design Language.Yu Liu, Satoshi Komatsu, Masahiro Fujita
2005IJCAIReal-Time Path Planning for Humanoid Robot Navigation.Jens-Steffen Gutmann, Masaki Fukuchi, Masahiro Fujita
2005ICRAA Floor and Obstacle Height Map for 3D Navigation of a Humanoid Robot.Jens-Steffen Gutmann, Masaki Fukuchi, Masahiro Fujita
2005IRIObject-oriented analysis and design of hardware/software co-designs with dependence analysis for design reuse.Masahiro Fujita, Shunsuke Sasaki, Ken Matsui
2005MEMOCODEExtended abstract: a formal design approach from software oriented UML descriptions to hardware oriented RTL.Masahiro Fujita
2005MEMOCODESynchronization verification in system-level design with ILP solvers.Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita
2004ICRABehavior Description and Control using Behavior Module for Personal Robot.Yukiko Hoshino, Tsuyoshi Takagi, Ugo Di Profio, Masahiro Fujita
2004IROSStair climbing for humanoid robots using stereo vision.Jens-Steffen Gutmann, Masaki Fukuchi, Masahiro Fujita
2004IROSBehavior selection and motion modulation in emotionally grounded architecture for QRIO SDR-4XII.Tsutomu Sawada, Tsuyoshi Takagi, Masahiro Fujita
2004VLSIDFormal Verification of C Language Based VLSI Designs.Masahiro Fujita
2004VLSIDHigh Level Design Validation: Current Practices and Future Directions.Indradeep Ghosh, Rajarshi Mukherjee, Mukul R. Prasad, Masahiro Fujita
2003ASPDACEvent-driven observability enhanced coverage analysis of C programs for functional validation.Farzan Fallah, Indradeep Ghosh, Masahiro Fujita
2003ASPDACIrredundant address bus encoding techniques based on adaptive codebooks for low power.Satoshi Komatsu, Masahiro Fujita
2003ASPDACLogic optimization for asynchronous speed independent controllers using transduction method.Hiroshi Saito, Hiroshi Nakamura, Masahiro Fujita, Takashi Nanya
2003DACFormal verification - prove it or pitch it.Rajesh K. Gupta, Shishpal Rawat, Sandeep K. Shukla, Brian Bailey, Daniel K. Beece, Masahiro Fujita, Carl Pixley, John O'Leary, Fabio Somenzi
2003DSNModel Checking for Dependable Software-Intensive Systems.Edmund M. Clarke, Masahiro Fujita, David P. Gluch
2003ICRAA small biped entertainment robot exploring attractive applications.Yoshihiro Kuroki, Masahiro Fujita, Tatsuzo Ishida, Ken'ichiro Nagasaka, Jin'ichi Yamaguchi
2003IROSAutonomous behavior control architecture of entertainment humanoid robot SDR-4X.Masahiro Fujita, Yoshihiro Kuroki, Tatsuzo Ishida, Toshi T. Doi
2003ISRRSDR-4X II: A Small Humanoid as an Entertainer in Home Environment.Masahiro Fujita, Kohtaro Sabe, Yoshihiro Kuroki, Tatsuzo Ishida, Toshi T. Doi
2003MEMOCODEEngineering Changes in Field Modifiable Architectures.Hiroshi Saito, Kenshu Seto, Yoshihisa Kojima, Satoshi Komatsu, Masahiro Fujita
2003VRHigh Presence Remote Presentation in the Shared Immersive Virtual World.Tetsuro Ogi, Toshio Yamada, Michitaka Hirose, Masahiro Fujita, Kazuto Kuzuu
2002FORTEVerification of Event-Based Synchronization of SpecC Description Using Difference Decision Diagrams.Thanyapat Sakunkonchak, Masahiro Fujita
2002PRDCFormal Verification of a Pipelined Processor with New Memory.Hiroshi Nakamura, Takanori Arai, Masahiro Fujita
2002VLSIDSimultaneous Circuit Transformation and Routing.Hiroaki Yoshida, Motohiro Sera, Masao Kubo, Masahiro Fujita
2002RoboCupSony Four Legged Robot League at RoboCup 2002.Masahiro Fujita
2001ICRAEthological Modeling and Architecture for an Entertainment Robot.Ronald C. Arkin, Masahiro Fujita, Tsuyoshi Takagi, Rika Hasegawa
2001IROSMotion entertainment by a small humanoid robot based on OPEN-R.Tatsuzo Ishida, Yoshihiro Kuroki, Jin'ichi Yamaguchi, Masahiro Fujita, Toshi T. Doi
2001PGMultiresolution Interpolation Meshes.Takashi Michikawa, Takashi Kanai, Masahiro Fujita, Hiroaki Chiyokura
2000ASPDACAutomatic partitioning for efficient combinatorial verification.Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Masahiro Fujita
2000DACAutomatic test pattern generation for functional RTL circuits using assignment decision diagrams.Indradeep Ghosh, Masahiro Fujita
2000DACEfficient variable ordering using aBDD based sampling.Yuan Lu, Jawahar Jain, Edmund M. Clarke, Masahiro Fujita
2000ICRADigital Creatures for Future Entertainment Robotics.Masahiro Fujita
2000ICRAEvolving Robust Gaits with AIBO.Gregory Hornby, Seiichi Takamura, Jun Yokono, Osamu Hanagata, Takashi Yamamoto, Masahiro Fujita
2000IROSA quadruped robot platform with basic software for RoboCup-99 legged robot league.Takashi Yamamoto, Masahiro Fujita
2000VLSIDHierarchical Error Diagnosis Targeting RTL Circuits.Vamsi Boppana, Indradeep Ghosh, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita
2000VTSTesting, Verification, and Diagnosis in the Presence of Unknowns.Ankur Jain, Vamsi Boppana, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita, Michael S. Hsiao
2000RoboCupOverview of RoboCup-2000.Peter Stone, Minoru Asada, Tucker R. Balch, Masahiro Fujita, Gerhard K. Kraetzschmar, Henrik Hautop Lund, Paul Scerri, Satoshi Tadokoro, Gordon F. Wyeth
1999CAVModel Checking Based on Sequential ATPG.Vamsi Boppana, Sreeranga P. Rajan, Koichiro Takayama, Masahiro Fujita
1999DACSymbolic Model Checking Using SAT Procedures instead of BDDs.Armin Biere, Alessandro Cimatti, Edmund M. Clarke, Masahiro Fujita, Yunshan Zhu
1999DACMultiple Error Diagnosis Based on Xlists.Vamsi Boppana, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita, Pradeep Bollineni
1999DATEAn Efficient Filter-Based Approach for Combinational Verification.Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Masahiro Fujita, Jacob A. Abraham, Donald S. Fussell
1999DATEOn Reducing Transitions Through Data Modifications.Rajeev Murgai, Masahiro Fujita
1999IROSSyntactic-semantic analysis of reconfigurable robot.Masahiro Fujita, Hiroaki Kitano, Toshitada Doi
1999VLSIDEfficient Scheduling Techniques for ROBDD Construction.Rajeev Murgai, Jawahar Jain, Masahiro Fujita
1999VTSOn the Evaluation of Arbitrary Defect Coverage of Test Sets.Ankur Jain, Michael S. Hsiao, Vamsi Boppana, Masahiro Fujita
1999RoboCupOverview of RoboCup-99.Manuela M. Veloso, Hiroaki Kitano, Enrico Pagello, Gerhard K. Kraetzschmar, Peter Stone, Tucker R. Balch, Minoru Asada, Silvia Coradeschi, Lars Karlsson, Masahiro Fujita
1998ASPDACModel Checking: Its Basics and Reality (Embedded Tutorial).Masahiro Fujita
1998DACUsing Complementation and Resequencing to Minimize Transitions.Rajeev Murgai, Masahiro Fujita, Arlindo L. Oliveira
1998FMTwo Real Formal Verification Experiences: ATM Switch Chip and Parallel Cache Protocol.Masahiro Fujita, Sreeranga P. Rajan, Alan J. Hu
1998ICCADSampling schemes for computing OBDD variable orderings.Jawahar Jain, William Adams, Masahiro Fujita
1998ICRASony Legged Robot for RoboCup Challenge.Hiroaki Kitano, Masahiro Fujita, Stphane Zrehen, Koji Kageyama
1998IROSPlaying soccer with legged robots.Manuela M. Veloso, William T. B. Uther, Masahiro Fujita, Minoru Asada, Hiroaki Kitano
1998ITCModeling the unknown! Towards model-independent fault and error diagnosis.Vamsi Boppana, Masahiro Fujita
1998VLSIDIntegration of High-Level Modeling, Formal Verification, and High-Level Synthesis in ATM Switch Design.Sreeranga P. Rajan, Masahiro Fujita
1998RoboCupA Quadruped Robot for RoboCup Legged Robot Challenge in Paris '98.Masahiro Fujita, Stphane Zrehen, Hiroaki Kitano
1997ICCADSpeeding up technology-independent timing optimization by network partitioning.Rajat Aggarwal, Rajeev Murgai, Masahiro Fujita
1997ICCDFormal Verification of the HAL S1 System Cache Coherence Protocol.Alan J. Hu, Masahiro Fujita, Chris Wilson
1997ICCDA Survey of Techniques for Formal Verification of Combinational Circuits.Jawahar Jain, Amit Narayan, Masahiro Fujita, Alberto L. Sangiovanni-Vincentelli
1997IROSA proposal of a quadruped robot platform for RoboCup.Masahiro Fujita, Koji Kageyama
1997VLSIDFormal Verification of Combinational Circuit.Jawahar Jain, Amit Narayan, Masahiro Fujita, Alberto L. Sangiovanni-Vincentelli
1997VLSIDSome Recent Advances in Software and Hardware Logic Simulation.Rajeev Murgai, Masahiro Fujita
1997RoboCupA Legged Robot for RoboCup Based on "OPENR".Masahiro Fujita, Hiroaki Kitano, Koji Kageyama
1996CAVVerification of Arithmetic Circuits by Comparing Two Similar Circuits.Masahiro Fujita
1996DACDomain-Specific High-Level Modeling and Synthesis for ATM Switch Design Using VHDL.Mike Tien-Chien Lee, Yu-Chin Hsu, Ben Chen, Masahiro Fujita
1996FMCADDecomposition Techniques for Efficient ROBDD Construction.Jawahar Jain, Amit Narayan, C. Coelho, Sunil P. Khatri, Alberto L. Sangiovanni-Vincentelli, Robert K. Brayton, Masahiro Fujita
1996ICCADPartitioned ROBDDs - a compact, canonical and efficiently manipulable representation for Boolean functions.Amit Narayan, Jawahar Jain, Masahiro Fujita, Alberto L. Sangiovanni-Vincentelli
1996VLSIDOn More Efficient Combinational ATPG Using Functional Learning.Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita, Jacob A. Abraham, Donald S. Fussell
1996VLSIDA study of composition schemes for mixed apply/compose based construction of ROBDDs.Amit Narayan, Sunil P. Khatri, Jawahar Jain, Masahiro Fujita, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
1995DACAdvanced Verification Techniques Based on Learning.Jawahar Jain, Rajarshi Mukherjee, Masahiro Fujita
1995DATEVERIFUL: VERIfication using FUnctional Learning.Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita
1995ICCADHybrid decision diagrams.Edmund M. Clarke, Masahiro Fujita, Xudong Zhao
1995ICCDSimple tree-construction heuristics for the fanout problem .Robert J. Carragher, Masahiro Fujita, Chung-Kuan Cheng
1995ICCDLogic synthesis for a single large look-up table.Rajeev Murgai, Masahiro Fujita, Fumiyasu Hirose
1994ICCADA redesign technique for combinational circuits based on gate reconnections.Yuji Kukimoto, Masahiro Fujita, Robert K. Brayton
1994ICCADLP based cell selection with constraints of timing, area, and power consumption.Yutaka Tamiya, Yusuke Matsunaga, Masahiro Fujita
1994ICCDYEPHCAD and FLORA: Logic Synthesis for Control and Datapath.Hitomi Sato, Michihiro Yamazaki, Masahiro Fujita
1994ISCASFast Spectrum Computation for Logic Functions using Binary Decision Diagrams.Masahiro Fujita, Jerry Chih-Yuan Yang, Edmund M. Clarke, Xudong Zhao, Patrick C. McGeer
1993DACSpectral Transforms for Large Boolean Functions with Applications to Technology Mapping.Edmund M. Clarke, Kenneth L. McMillan, Xudong Zhao, Masahiro Fujita, Jerry Chih-Yuan Yang
1993ICCADAn efficient algorithm for the net matching problem.Robert J. Carragher, Chung-Kuan Cheng, Masahiro Fujita
1993ICCDSynthesis of Controllers from Interval Temporal Logic Specification.Masahiro Fujita, Shinji Kono
1993ICRAMotion Planning and Control for a Robot Performer.Takeshi Sakaguchi, Masahiro Fujita, Hiroshi Watanabe, Fumio Miyazaki
1992DACEfficient Sum-to-One Subsets Algorithm for Logic Optimization.Kuang-Chien Chen, Masahiro Fujita
1992FPGAPatching Method for Lookup-Table Type FPLs.Masahiro Fujita, Yuji Kukimoto
1992ICCADRectification method for lookup-table type FPGA's.Yuji Kukimoto, Masahiro Fujita
1992ICCDRTL Design Verification by Making Use of Datapath Information.Masahiro Fujita
1992ICRAForce control without force sensor based on mixed sensitivity HKiyoshi Ohishi, Masaru Miyazaki, Masahiro Fujita, Yasumasa Ogino
1991DACA Resynthesis Approach for Network Optimization.Kuang-Chien Chen, Yusuke Matsunaga, Saburo Muroga, Masahiro Fujita
1991ICCADMulti-Level Logic Minimization Based on Minimal Support and its Application to the Minimization of Look-Up Table Type FPGAs.Masahiro Fujita, Yusuke Matsunaga
1991ICCADApplication of Boolean Unification to Combinational Logic Synthesis.Masahiro Fujita, Yutaka Tamiya, Yuji Kukimoto, Kuang-Chien Chen
1991ICCDConcurrent Resynthesis for Network Optimization.Kuang-Chien Chen, Masahiro Fujita
1990CAVA Data Path Verifier for Register Transfer Level Using Temporal Logic Language Tokio.Hiroshi Nakamura, Yuji Kukimoto, Masahiro Fujita, Hidehiko Tanaka
1990DACBoolean Resubstitution with Permissible Functions and Binary Decision Diagrams.Hitomi Sato, Yoshihiro Yasue, Yusuke Matsunaga, Masahiro Fujita
1990ICCADAutomatic and Semi-Automatic Verification of Switch-Level Circuits with Temporal Logic and Binary Decision Diagrams.Masahiro Fujita, Yusuke Matsunaga, Takeo Kakuda
1990ICCADMulti-Level Logic Minimization Across Latch Boundaries.Yusuke Matsunaga, Masahiro Fujita, Takeo Kakuda
1990ICCDPractical design assistance at register transfer level using a data path verifier.Hiroshi Nakamura, Yuji Kukimoto, Masahiro Fujita, Hidehiko Tanaka
1990ICCDBoolean technology mapping for both ECI and CMOS circuits based on permissible functions and binary decision diagrams.Hitomi Sato, Norikazu Takahashi, Yusuke Matsunaga, Masahiro Fujita
1989ICCADMulti-level logic optimization using binary decision diagrams.Yusuke Matsunaga, Masahiro Fujita
1988ICCADEvaluation and improvement of Boolean comparison method based on binary decision diagrams.Masahiro Fujita, Hisanori Fujisawa, Nobuaki Kawato
1986ICLPTokio: Logic Programming Language Based on Temporal Logic and its Compilation to Prolog.Masahiro Fujita, Shinji Kono, Hidehiko Tanaka, Tohru Moto-Oka